On Thu, 02 Apr 2015 17:28:00 +0900 Masanobu SAITOH <msai...@execsw.org> wrote:
> A few weeks ago, I got a 2-way Xeon machine to test Intel X540 support. > Afrer finishing X540 test, I noticed that the machine had DDR4. I tried > to check the spdmem. It seemed that the machine's spdmem is not connected > via C612's internal i2c bus but via others. I stopped writing DDR4 support > and just added the basic types only because I couldn't test with the machine. This seems to be common on current generation server/workstation hardware. I think the SPD devices are hidden behind an i2c multiplexer in a platform specific way, possibly to avoid fan-out problems or interference with smbus out-of-band management functions. To read SPD on these machines the multiplexer (which should be addressable on the main segment, check with i2cscan) must first be configured to pass though the correct bus segment.
