On Mon, Oct 08, 2012 at 08:12:26AM +0100, David Laight wrote: > On Sat, Oct 06, 2012 at 02:10:46PM +0000, Joerg Sonnenberger wrote: > > Module Name: src > > Committed By: joerg > > Date: Sat Oct 6 14:10:46 UTC 2012 > > > > Modified Files: > > src/external/gpl3/gcc/dist/gcc/config/i386: i386.h > > > > Log Message: > > PR 46978: ICE on spilling MMX registers > > > > GCC/i386 has code to lower the required alignment for long long to 32bit > > as the CPU doesn't need more. It is also using the same mode for setting > > up the MMX registers and in turn, the stack slots reserved for spilling > > require 32bit alignment. The actual vector types used keep the original > > 64bit alignment, so when the compiler wants to spill a MMX register, it > > hits an assertion. Fix this by using the vector type as raw type for MMX > > registers. > > Doesn't that enforce a 64bit alignment when it isn't needed?
Correct. Given the general usefulness of MMX, I'm inclined to just ignore it. > Misaligned transfers for stack slots for MMX are actually fine. Also correct. I haven't had time to hunt down where it comes up with that assumption though. Joerg
