On Fri, Feb 25, 2011 at 07:55:07PM +0000, Jukka Ruohonen wrote:
> Log Message:
> Start to derive the percpu(9) (or per-domain) state coordination
> mechanisms by parsing the _CSD, _PSD, and _TSD objects by default.
This is quite interesting development affecting the whole x86; the sleep and
performance states are no longer necessarily shared by all CPUs in the system.
Currently we do a xcall(9) and write the MSRs to all CPUs. But new x86 CPUs
can do percpu(9) -- or rather "per-core" or "per CPU domain" -- coordination.
Note that these are not "software constructs" or "BIOS constructs"; as
usual, ACPI just supplies the data for us. While I need to study this more,
the basic scenario is:
set 1 = { CPU0, CPU1 } and set 2 = { CPU2, CPU3 }.
Write the MSR for CPU0 -> the whole set 1 transforms.
This is also important due to the recent "TurboBoost" and AMD's equivalent;
The set 1 enters C3 -> the set 2 can enter high-performance P-state.
Are there any plans for kernel equivalent to cpuset(3)?
- Jukka.
