Module Name: src
Committed By: matt
Date: Sat Feb 27 07:58:53 UTC 2010
Modified Files:
src/sys/arch/mips/conf [matt-nb5-mips64]: files.mips
src/sys/arch/mips/include [matt-nb5-mips64]: cpu.h locore.h pmap.h
src/sys/arch/mips/mips [matt-nb5-mips64]: mipsX_subr.S mips_machdep.c
pmap.c pmap_tlb.c
Added Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: mips_fixup.c
Log Message:
Add mipsXX_tlb_enter which modifies/sets a specific TLB entry with a new
mapping (useful for wired TLB entries).
Add mips_fixup_exceptions which will walk through the exception vectors
and allows the fixup of any cpu_info references to be changed to a more
MP-friendly incarnation.
Define a common fixup method to use a wired TLB entry at -PAGE_SIZE allowing
direct loads using a negative based from the zero register.
Change varible pmap_tlb_info t pmap_tlb0_info.
To generate a diff of this commit:
cvs rdiff -u -r1.58.24.8 -r1.58.24.9 src/sys/arch/mips/conf/files.mips
cvs rdiff -u -r1.90.16.22 -r1.90.16.23 src/sys/arch/mips/include/cpu.h
cvs rdiff -u -r1.78.36.1.2.15 -r1.78.36.1.2.16 \
src/sys/arch/mips/include/locore.h
cvs rdiff -u -r1.54.26.10 -r1.54.26.11 src/sys/arch/mips/include/pmap.h
cvs rdiff -u -r1.26.36.1.2.26 -r1.26.36.1.2.27 \
src/sys/arch/mips/mips/mipsX_subr.S
cvs rdiff -u -r0 -r1.1.2.1 src/sys/arch/mips/mips/mips_fixup.c
cvs rdiff -u -r1.205.4.1.2.1.2.36 -r1.205.4.1.2.1.2.37 \
src/sys/arch/mips/mips/mips_machdep.c
cvs rdiff -u -r1.179.16.18 -r1.179.16.19 src/sys/arch/mips/mips/pmap.c
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/mips/pmap_tlb.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
