On Fri, Apr 4, 2008 at 10:53 PM, Marc Bevand <[EMAIL PROTECTED]> wrote:
> > with him, and I noticed that there are BIOS settings for the pcie max
> > payload size. The default value is 4096 bytes.
>
> I noticed. But it looks like this setting has no effect on anything
> whatsoever.
My guess
On Sat, Mar 15, 2008 at 2:06 PM, Marc Bevand <[EMAIL PROTECTED]> wrote:
> I think I'll go back to the 128-byte setting. I wouldn't want to
> see errors happening under heavy usage even though my stress
> tests were all successful (aggregate data rate of 610 MB/s
> generated by reading the disks
Anton B. Rang acm.org> writes:
> Looking at the AMD 690 series manual (well, the family
> register guide), the max payload size value is deliberately
> set to 0 to indicate that the chip only supports 128-byte
> transfers. There is a bit in another register which can be
> set to ignore max-payload
Anton B. Rang acm.org> writes:
>
> Be careful of changing the Max_Payload_Size parameter. It needs to match,
> and be supported, between all PCI-E components which might communicate with
> each other. You can tell what values are supported by reading the Device
> Capabilities Register and checkin
Be careful of changing the Max_Payload_Size parameter. It needs to match, and
be supported, between all PCI-E components which might communicate with each
other. You can tell what values are supported by reading the Device
Capabilities Register and checking the Max_Payload_Size Supported bits.
