This implies there's no need to forcefully reserve the VGA MMIO
region, since the memory map provided will be correct.
Reported-by: Andrew Cooper
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
xen/arch/x86/e820.c | 11 ++-
1 file changed, 6 inser
When running Xen as a guest it's not necessary to mark such pages as
RAM because they won't be assigned to the initial domain memory map.
While there move the functions to the PV shim specific file and rename
them accordingly.
No functional change expected.
Reported-by: Andrew Cooper
Signed-off
This function is based on the Linux e820__range_remove function,
modified to fit Xen coding style.
Signed-off-by: Roger Pau Monné
---
---
xen/arch/x86/e820.c| 56 ++
xen/include/asm-x86/e820.h | 2 ++
2 files changed, 58 insertions(+)
diff --git a/xe
Hello,
This series includes some miscellaneous fixes for the pv-shim mode,
specially regarding the handling of the memory map.
Thanks, Roger.
Roger Pau Monne (4):
x86/e820: introduce a function to remove ranges from e820
x86/e820: do not fixup memmap in copy_e820_map
x86/e820: assume
And instead introduce a new helper to mark the low 1MB VGA/ROM region
as reserved. Note this might be a slight change from current functionality
where copy_e820_map would just leave a hole in the [640KB, 1MB) region
if it was found to be reported as RAM in the memory map.
No functional change expe
Add a verbose option to the dom0 command line, so that dom0 builder
can print extra debug information when required.
Use this new verbose mode to print statistics about memory allocations
when populating dom0 p2m.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian J
Hello,
This series contains an improvement when filling the p2m so that
alignment is taken into account when allocating and populating the p2m.
The last patch is optional and adds a verbose mode to dom0 build so more
information can be printed.
Thanks, Roger.
Roger Pau Monne (2):
x86/dom0
Current code that allocates memory and populates the p2m for PVH Dom0
doesn't take the address alignment into account, this can lead to high
order allocations that start on a non-aligned address to be broken
down into lower order entries on the p2m page tables.
Fix this by taking into account the
This function is based on the Linux e820__range_remove function,
adjusted to fit Xen.
Signed-off-by: Roger Pau Monné
Acked-by: Andrew Cooper
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
Changes since v1:
- Fix one coding style issue.
---
xen/arch/x86/e820.c| 57
And instead use the newly introduced e820_remove_range helper to
remove any RAM region from the low 1MB VGA/ROM region afterwards.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
xen/arch/x86/e820.c | 26
Hello,
This series includes some miscellaneous fixes for the pv-shim mode,
specially regarding the handling of the memory map.
It can be found on my git branch:
git://xenbits.xen.org/people/royger/xen.git guest-fixes-v2
Thanks, Roger.
Roger Pau Monne (4):
x86/e820: introduce a function to
When running Xen as a guest it's not necessary to mark such pages as
RAM because they won't be assigned to the initial domain memory map.
While there move the functions to the PV shim specific file and rename
them accordingly.
No functional change expected.
Reported-by: Andrew Cooper
Signed-off
This implies there's no need to forcefully reserve the VGA MMIO
region, since the memory map provided will be correct.
Reported-by: Andrew Cooper
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
Changes since v1:
- Assume the memory map is always correct w
As that seems to be the prevailing style.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc: Konrad Rzeszutek Wilk
Cc: Stefano Stabellini
Cc: Tim Deegan
Cc: Wei Liu
---
MAINTAINERS | 66 ++--
use of the HVM
pci-passthrough infrastructure, I've become acquainted with the PCI code
and I think I can help with reviews.
Roger Pau Monne (4):
maintainers: always use hard tabs
x86/passthrough: move io.c to the x86 subfolder
x86/passthrough: put the x86 folder under x86 maintainership
It makes no sense for io.c to be on the top level passthrough
directory, since it's x86 specific.
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
---
xen/drivers/passthrough/Makefile | 3 ---
xen/drivers/passthrough/x86/Makefile | 1 +
xen/drivers/passthrough/{
And add myself as reviewer.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc: Konrad Rzeszutek Wilk
Cc: Stefano Stabellini
Cc: Tim Deegan
Cc: Wei Liu
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
passthrough/x86 is tied to the x86 code, and as such put it under x86
maintainership.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc: Konrad Rzeszutek Wilk
Cc: Stefano Stabellini
Cc: Tim Deegan
Cc: Wei Liu
---
M
There's no reason to use long to store the alignment, since the bigger
page size is 1GB, and the alignment is stored as a frame number.
Reported-by: Jan Beulich
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
xen/arch/x86/hvm/dom0_build.c | 3 +--
1 file
Add a verbose option to the dom0 command line, so that dom0 builder
can print extra debug information when required.
Use this new verbose mode to print statistics about memory allocations
when populating dom0 p2m.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian J
Sorry for the wrong formatting.
From: Xen-devel on behalf of Jan
Beulich :
--- a/xen/common/Makefile
+++ b/xen/common/Makefile
@@ -21,7 +21,7 @@ obj-$(CONFIG_KEXEC) += kimage.o
obj-y += lib.o
obj-$(CONFIG_NEEDS_LIST_SORT) += list_sort.o
obj-$(CONFIG_LIVEPATCH) += livepatch.o livepatch_elf.o
The current check for the present bit is wrong, since the present bit
is located in the low part of the entry.
Fixes: e8afe1124cc1 ("iommu: elide flushing for higher order map/unmap
operations")
Signed-off-by: Roger Pau Monné
---
Cc: Suravee Suthikulpanit
Cc: Brian Woods
Cc: Juergen Gross
Cc:
The order of the page_order and the flags parameters are inverted in
the call to iommu_map made in iommu_hwdom_init.
Fixes: e8afe1124cc1 ("iommu: elide flushing for higher order map/unmap
operations")
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Paul Durrant
---
xen/drivers/passthro
The current GSI mapping code can cause the following deadlock:
(XEN) *** Dumping CPU0 host state: ***
(XEN) [ Xen-4.12.0-rc x86_64 debug=y Tainted: C ]
[...]
(XEN) Xen call trace:
(XEN)[] vmac.c#_spin_lock_cb+0x32/0x70
(XEN)[] vmac.c#hvm_gsi_assert+0x2f/0x60 <- pick
hvm.irq
le
to create guests. Overall the patches are a nice cleanup to the handling
of p2m_ioreq_server and p2m_map_foreign types.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git fixes-4.12
Thanks, Roger.
Roger Pau Monne (8):
dom0/pvh: align allocation and mapping order to
Current code in shadow_enable will allocate a shadow pool of 4MB
regardless of the values of sh_min_allocation or
shadow_min_acceptable_pages, which means that calls to
shadow_alloc_p2m_page can fail even after the check and allocation
done just above.
Fix this by always checking that the pool is
The assert was originally added to make sure that higher order
regions (> PAGE_ORDER_4K) could not be used to bypass the
mmio_ro_ranges check performed by p2m_type_to_flags.
This however is already checked in set_mmio_p2m_entry, which makes
sure that higher order mappings don't overlap with mmio_r
Due to the recent changes in the iommu mapping logic, the start
addresses provided need to be aligned to the order intended to be
mapped.
dom0 PVH domain builder didn't take this into account when populating
the p2m, fix this by making sure the order is chosen so that the start
address is aligned
Reserved memory ranges below 1MB on a PVH dom0 are added to the HAP
page tables, but due to this being done before setting up the IOMMU
the non RAM regions in those areas are not added to the IOMMU page
tables. Fix this by making sure any reserved regions below 1MB are
added to the IOMMU page table
Current npt and shadow code to get an entry will always return
INVALID_MFN for foreign entries. Allow to return the entry mfn for
foreign entries, like it's done for grant table entries.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
xe
There have been several reports of the dom0 builder running out of
memory when buildign a PVH dom0 without havingf specified a dom0_mem
value. Print a warning message if dom0_mem is not set to a fixed value
when booting in PVH mode.
Signed-off-by: Roger Pau Monné
---
Cc: Jan Beulich
Cc: Andrew C
So that it can be shared by both ept, npt and shadow code, instead of
duplicating it.
No change in functionality intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Jun Nakajima
Cc: Kevin Tian
Cc: Paul Durrant
---
xen/arch/x86/
So that the specific handling can be removed from
atomic_write_ept_entry and be shared with npt and shadow code.
This commit also removes the check that prevent non-ept PVH dom0 from
mapping foreign pages.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Switch rmrr_identity_mapping to use iommu_{un}map in order to
establish RMRR mappings for PV domains, like it's done in
arch_iommu_hwdom_init. This solves the issue of a PV hardware domain
not getting RMRR mappings because {set/clear}_identity_p2m_entry was
not properly updating the iommu page tabl
Current code calls apic_x2apic_probe which does some initialization
and setup before having enabled x2APIC mode (if it's not already
enabled by the firmware).
This can lead to issues if the APIC ID doesn't match the x2APIC ID, as
apic_x2apic_probe calls init_apic_ldr_x2apic_cluster which depending
The level passed to ept_invalidate_emt corresponds to the EPT entry
passed as the mfn parameter, which is a pointer to an EPT page table,
hence the entries in that page table will have one level less than the
parent.
Fix the call to atomic_write_ept_entry to pass the correct level, ie:
one level l
Internal ioreq servers are always processed first, and ioreqs are
dispatched by calling the handler function. If no internal servers have
registered for an ioreq it's then forwarded to external callers.
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/hvm/ioreq.c | 19 ++-
1 file
Switch vPCI to become an internal ioreq server, and hence drop all the
vPCI specific decoding and trapping to PCI IO ports and MMCFG regions.
This allows to unify the vPCI code with the ioreq infrastructure,
opening the door for domains having PCI accesses handled by vPCI and
other ioreq servers a
Internal ioreq servers are plain function handlers implemented inside
of the hypervisor. Note that most fields used by current (external)
ioreq servers are not needed for internal ones, and hence have been
placed inside of a struct and packed in an union together with the
only internal specific fie
Provide a routine to register the handler for an internal ioreq
server. Note the handler can only be set once.
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/hvm/ioreq.c| 32
xen/include/asm-x86/hvm/ioreq.h | 3 +++
2 files changed, 35 insertions(+)
di
...and switch vPCI to use this infrastructure for long running
physmap modification operations.
This allows to get rid of the vPCI specific modifications done to
handle_hvm_io_completion and allows generalizing the support for
long-running operations to other internal ioreq servers. Such support
i
Pick up on the infrastructure already added for vPCI and allow ioreq
to decode accesses to MMCFG regions registered for a domain. This
infrastructure is still only accessible from internal callers, so
MMCFG regions can only be registered from the internal domain builder
used by PVH dom0.
Note that
handled by other
ioreq servers.
The implementation is fairly simple and limited to what's needed by
vPCI, but can be expanded in the future if other more complex users
appear.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git ioreq_vpci_v1
Thanks, Roger.
Roger Pau
Add support for internal ioreq servers to initialization and
deinitialization routines, prevent some functions from being executed
against internal ioreq servers and add guards to only allow internal
callers to modify internal ioreq servers. External callers (ie: from
hypercalls) are only allowed t
The new format specifier is '%pp', and prints a pci_sbdf_t using the
seg:bus:dev.func format. Replace all SBDFs printed using
'%04x:%02x:%02x.%u' to use the new format specifier.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Changes since v1:
- Use base 8 to print the functi
This partially reverts commit
854a49a7486a02edae5b3e53617bace526e9c1b1 by re-adding the logic that
propagates changes to the domain physmap done by p2m_pt_set_entry into
the iommu page tables. Without this logic changes to the guest physmap
are not propagated to the iommu, leaving stale iommu entri
This partially reverts commit
854a49a7486a02edae5b3e53617bace526e9c1b1 by re-adding the logic that
propagates changes to the domain physmap done by p2m_pt_set_entry into
the iommu page tables. Without this logic changes to the guest physmap
are not propagated to the iommu, leaving stale iommu entri
le
to create guests. Overall the patches are a nice cleanup to the handling
of p2m_ioreq_server and p2m_map_foreign types.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git fixes-4.12-v2.1
Roger Pau Monne (7):
dom0/pvh: align allocation and mapping order to start ad
The p2m and iommu mapping code always had the requirement that
addresses and orders must be aligned when populating the p2m or the
iommu page tables.
PVH dom0 builder didn't take this requirement into account, and can
call into the p2m/iommu mapping helpers with addresses and orders that
are not a
So that the specific handling can be removed from
atomic_write_ept_entry and be shared with npt and shadow code.
This commit also removes the check that prevent non-ept PVH dom0 from
mapping foreign pages.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
There have been several reports of the dom0 builder running out of
memory when building a PVH dom0 without having specified a dom0_mem
value. Print a warning message if dom0_mem is not set when booting in
PVH mode.
This is a temporary workaround until accounting for internal memory
required by Xen
Current npt and shadow code to get an entry will always return
INVALID_MFN for foreign entries. Allow to return the entry mfn for
foreign entries, like it's done for grant table entries.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
xe
The assert was originally added to make sure that higher order
regions (> PAGE_ORDER_4K) could not be used to bypass the
mmio_ro_ranges check performed by p2m_type_to_flags.
This however is already checked in set_mmio_p2m_entry, which makes
sure that higher order mappings don't overlap with mmio_r
So that the iommu is initialized before populating the p2m, and
entries added get the corresponding iommu page table entries if
required. This requires splitting the current pvh_setup_p2m into two
different functions. One that crafts dom0 physmap and sets the paging
allocation, and another one that
So that it can be shared by both ept, npt and shadow code, instead of
duplicating it.
No change in functionality intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Jun Nakajima
Cc: Kevin Tian
Cc: Paul Durrant
---
Changes since
This is in preparation for also changing p2m_entry_modify to return an
error code.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Tim Deegan
---
Changes since v2:
- New in this version.
---
xen/arch/x86
So that it can be shared by both ept, npt and shadow code, instead of
duplicating it.
No change in functionality intended.
Signed-off-by: Roger Pau Monné
Reviewed-by: Paul Durrant
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Jun Nakajima
Cc: Kevin Tian
Cc: Paul
The assert was originally added to make sure that higher order
regions (> PAGE_ORDER_4K) could not be used to bypass the
mmio_ro_ranges check performed by p2m_type_to_flags.
This however is already checked in set_mmio_p2m_entry, which makes
sure that higher order mappings don't overlap with mmio_r
Current npt and shadow code to get an entry will always return
INVALID_MFN for foreign entries. Allow to return the entry mfn for
foreign entries, like it's done for grant table entries.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
Cha
nable
to create guests. Overall the patches are a nice cleanup to the handling
of p2m_ioreq_server and p2m_map_foreign types IMO.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git fixes-4.12-v3
Roger Pau Monne (8):
dom0/pvh: align allocation and mapping order to
There have been several reports of the dom0 builder running out of
memory when building a PVH dom0 without having specified a dom0_mem
value. Print a warning message if dom0_mem is not set when booting in
PVH mode.
This is a temporary workaround until accounting for internal memory
required by Xen
So that the specific handling can be removed from
atomic_write_ept_entry and be shared with npt and shadow code.
This commit also removes the check that prevent non-ept PVH dom0 from
mapping foreign pages.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
So that the iommu is initialized before populating the p2m, and
entries added get the corresponding iommu page table entries if
required. This requires splitting the current pvh_setup_p2m into two
different functions. One that crafts dom0 physmap and sets the paging
allocation, and another one that
The p2m and iommu mapping code always had the requirement that
addresses and orders must be aligned when populating the p2m or the
iommu page tables.
PVH dom0 builder didn't take this requirement into account, and can
call into the p2m/iommu mapping helpers with addresses and orders that
are not a
Avoid printing a warning message when writing to a BAR register with
memory decoding enabled if the value written is the same as the
current one.
No functional change.
Signed-off-by: Roger Pau Monné
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc:
So that it can be shared by both ept, npt and shadow code, instead of
duplicating it.
No change in functionality intended.
Signed-off-by: Roger Pau Monné
Reviewed-by: Paul Durrant
Reviewed-by: George Dunlap
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Jun Nakajim
Current npt and shadow code to get an entry will always return
INVALID_MFN for foreign entries. Allow to return the entry mfn for
foreign entries, like it's done for grant table entries.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
---
Cha
.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git fixes-v4
Thanks, Roger.
Roger Pau Monne (4):
x86/mm: split p2m ioreq server pages special handling into helper
p2m: change write_p2m_entry to return an error code
x86/mm: handle foreign mappings in p2m_entry_modify
So that the specific handling can be removed from
atomic_write_ept_entry and be shared with npt and shadow code.
This commit also removes the check that prevent non-ept PVH dom0 from
mapping foreign pages.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
This is in preparation for also changing p2m_entry_modify to return an
error code.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Tim Deegan
---
Changes since v3:
- Use asserts instead of bugs to check r
The FreeBSD implementation is missing the following functions:
osdep_gnttab_dmabuf_exp_from_refs
osdep_gnttab_dmabuf_exp_wait_released
osdep_gnttab_dmabuf_imp_to_refs
osdep_gnttab_dmabuf_imp_release
Which all deal with dmabufs, that only exists on Linux. Implement them
using abort, since such fun
md64" 133321
build-amd64-freebsd-packages
I've pushed the patch series to my git repo:
git://xenbits.xen.org/people/royger/osstest.git freebsd-pkg
Thanks, Roger.
Roger Pau Monne (6):
osstest: introduce a helper to stash a whole directory
osstest: introduce a helper to create a weblink
Without compressing it.
Signed-off-by: Roger Pau Monné
---
Osstest/TestSupport.pm | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/Osstest/TestSupport.pm b/Osstest/TestSupport.pm
index 334cc2cb..c6da5ee9 100644
--- a/Osstest/TestSupport.pm
+++ b/Osstest/Tes
This removes the dependency on the official pkg repository, which is
dangerous when not testing stable branches, since the ABI of the
development branch is not stable, and thus it's easy for packages to
get out of sync, or for osstest to test an old FreeBSD version that
has an ABI different than th
This only works when the svn revision is stored as a git note
with the format 'revision='.
Such conversion is required in order to bootstrap a FreeBSD system
without relying on external package repositories. FreeBSD base system
only contains a subversion client (no git client), and thus in order
t
In the same way allow to perform several fetches in the same retrieve
transaction.
Further patches will anoint a FreeBSD image and a binary ports tree
in the same transaction, and it's required to do it in the same
transaction in order to avoid inconsistencies when fetching them.
Note that most o
The building of the binary packages itself is done with the poudriere
tool, that given a set of port names generates a binary package
repository with the requested packages and all it's dependencies.
Add a packages build job in the FreeBSD flight. Note that the binary
packages generated are tied t
Signed-off-by: Roger Pau Monné
---
Osstest/TestSupport.pm | 13 +
1 file changed, 13 insertions(+)
diff --git a/Osstest/TestSupport.pm b/Osstest/TestSupport.pm
index c6da5ee9..12427d11 100644
--- a/Osstest/TestSupport.pm
+++ b/Osstest/TestSupport.pm
@@ -125,6 +125,7 @@ BEGIN {
.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git fixes-v5
Thanks, Roger.
Roger Pau Monne (5):
x86/p2m: pass the p2m to write_p2m_entry handlers
x86/mm: split p2m ioreq server pages special handling into helper
p2m: change write_p2m_entry to return an error code
So that it can be shared by both ept, npt and shadow code, instead of
duplicating it.
No change in functionality intended.
Signed-off-by: Roger Pau Monné
Reviewed-by: Paul Durrant
Reviewed-by: George Dunlap
Reviewed-by: Kevin Tian
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc:
So that the specific handling can be removed from
atomic_write_ept_entry and be shared with npt and shadow code.
This commit also removes the check that prevent non-ept PVH dom0 from
mapping foreign pages.
Signed-off-by: Roger Pau Monné
Reviewed-by: Kevin Tian
---
Cc: George Dunlap
Cc: Jan Beu
Current callers pass the p2m to paging_write_p2m_entry, but the
implementation specific handlers of the write_p2m_entry hook instead
of a p2m get a domain struct due to the handling done in
paging_write_p2m_entry.
Change the code so that the implementations of write_p2m_entry take a
p2m instead of
This is in preparation for also changing p2m_entry_modify to return an
error code.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Tim Deegan
---
Changes since v4:
- Handle errors in loops to avoid overwr
Current npt and shadow code to get an entry will always return
INVALID_MFN for foreign entries. Allow to return the entry mfn for
foreign entries, like it's done for grant table entries.
Signed-off-by: Roger Pau Monné
Reviewed-by: Jan Beulich
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Co
This is in preparation for also changing p2m_entry_modify to return an
error code.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Tim Deegan
---
Changes since v5:
- Return -EOPNOTSUPP from _write_p2m_ent
So that the specific handling can be removed from
atomic_write_ept_entry and be shared with npt and shadow code.
This commit also removes the check that prevent non-ept PVH dom0 from
mapping foreign pages.
Signed-off-by: Roger Pau Monné
Reviewed-by: Kevin Tian
---
Cc: George Dunlap
Cc: Jan Beu
Current npt and shadow code to get an entry will always return
INVALID_MFN for foreign entries. Allow to return the entry mfn for
foreign entries, like it's done for grant table entries.
Signed-off-by: Roger Pau Monné
Reviewed-by: Jan Beulich
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Co
.
The series can also be found at:
git://xenbits.xen.org/people/royger/xen.git fixes-v6
Thanks, Roger.
Roger Pau Monne (5):
x86/p2m: pass the p2m to write_p2m_entry handlers
x86/mm: split p2m ioreq server pages special handling into helper
p2m: change write_p2m_entry to return an error code
Current callers pass the p2m to paging_write_p2m_entry, but the
implementation specific handlers of the write_p2m_entry hook instead
of a p2m get a domain struct due to the handling done in
paging_write_p2m_entry.
Change the code so that the implementations of write_p2m_entry take a
p2m instead of
So that it can be shared by both ept, npt and shadow code, instead of
duplicating it.
No change in functionality intended.
Signed-off-by: Roger Pau Monné
Reviewed-by: Paul Durrant
Reviewed-by: George Dunlap
Reviewed-by: Kevin Tian
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc:
This is in preparation for also changing p2m_entry_modify to return an
error code.
No functional change intended.
Signed-off-by: Roger Pau Monné
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Wei Liu
Cc: Tim Deegan
---
Changes since v6:
- Fix line wrapping in p2m_next_level.
Current check for MSI EIO is missing a special case for PVH Dom0,
which doesn't have a hvm_irq_dpci struct but requires EIOs to be
forwarded to the physical lapic for passed-through devices.
Add a short-circuit to allow EOIs from PVH Dom0 to be propagated.
Signed-off-by: Roger Pau Monné
---
Cc:
Or if it's not possible to honor the hinted address an error is returned
instead. This makes it easier to spot the actual failure, instead of
failing later on when the caller of xen_remap_bucket realizes the
mapping has not been created at the requested address.
Also note that at least on FreeBSD
Or if it's not possible to honor the hinted address an error is returned
instead. This makes it easier to spot the actual failure, instead of
failing later on when the caller of xen_remap_bucket realizes the
mapping has not been created at the requested address.
Also note that at least on FreeBSD
Or if it's not possible to honor the hinted address an error is returned
instead. This makes it easier to spot the actual failure, instead of
failing later on when the caller of xen_remap_bucket realizes the
mapping has not been created at the requested address.
Also note that at least on FreeBSD
This involves initializing the boot params EFI related fields and the
efi global variable.
Without this fix a PVH dom0 doesn't detect when booted from EFI, and
thus doesn't support accessing any of the EFI related data.
Reported-by: PGNet Dev
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovs
Or else xen_domain() returns false despite xen_pvh being set.
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovsky
Cc: Juergen Gross
Cc: xen-devel@lists.xenproject.org
---
arch/x86/xen/enlighten_pvh.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86
Or else xen_domain() returns false despite xen_pvh being set.
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovsky
Cc: Juergen Gross
Cc: xen-devel@lists.xenproject.org
---
arch/x86/xen/enlighten_pvh.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/xen/enlighten_pvh.c b/arch/x86
This involves initializing the boot params EFI related fields and the
efi global variable.
Without this fix a PVH dom0 doesn't detect when booted from EFI, and
thus doesn't support accessing any of the EFI related data.
Reported-by: PGNet Dev
Signed-off-by: Roger Pau Monné
---
Cc: Boris Ostrovs
To the Makefile that generates the cpuid policy. Without this fix if
the tools python interpreter is different than the default 'python' it
won't be correctly propagated.
Signed-off-by: Roger Pau Monné
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/include/Makefile | 2 +-
1 file changed, 1 inserti
101 - 200 of 2554 matches
Mail list logo
