Cheers,
[1] https://lists.xen.org/archives/html/xen-devel/2019-09/msg01407.html
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ported-by: Oleksandr
With one NIT below:
Acked-by: Julien Grall
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc: Konrad Rzeszutek Wilk
Cc: Stefano Stabellini
Cc: Tim Deegan
Cc: Wei Liu
---
xen/common/sysctl.c | 6 --
xen
Hi,
On 9/26/19 11:33 AM, hong...@amazon.com wrote:
On 26/09/2019 11:21, Julien Grall wrote:
Hi,
Thank you for posting the series.
On 9/26/19 10:45 AM, hong...@amazon.com wrote:
From: Hongyan Xia
Previously, Wei Liu has created the patch series to switch to
alloc/map/unmap/free APIs for
Hi,
On 9/26/19 11:45 AM, hong...@amazon.com wrote:
On 26/09/2019 11:23, Julien Grall wrote:
Hi,
NIT: we don't usually add full stop at the end of the title. This
applies for the rest of the series.
Thanks.
On 9/26/19 10:46 AM, hong...@amazon.com wrote:
From: Hongyan Xia
Not unma
Hi,
On 9/26/19 12:18 PM, hong...@amazon.com wrote:
On 26/09/2019 11:39, Julien Grall wrote:
Hi,
NIT Title: Please remove full stop.
On 9/26/19 10:46 AM, hong...@amazon.com wrote:
From: Hongyan Xia
Please provide a description of what/why you are doing this in the
commit message.
Also
Hi,
On 9/26/19 1:36 PM, hong...@amazon.com wrote:
On 26/09/2019 12:21, Julien Grall wrote:
Hi,
From the title, this patch is doing two things:
1) Map bootmem_region_list
2) Fix double unmap bug
It is not entirely clear how the latter is related to the former. Can
you explain it
ocumentation/devicetree/bindings/iommu/iommu.txt
Signed-off-by: Oleksandr Tyshchenko
Acked-by: Julien Grall
Cheers,
CC: Julien Grall
CC: Jan Beulich
---
Changes V5 -> V6:
- added check for the function's return value in both cases
- removed extra check for dt_devic
bled.
Signed-off-by: Paul Durrant
Reported-by: Oleksandr
Preferably with the adjustments mantioned elsewhere
Reviewed-by: Jan Beulich
I have done it while committing the patch.
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Hi,
On 9/26/19 2:03 PM, hong...@amazon.com wrote:
On 26/09/2019 13:24, Julien Grall wrote:
Hi,
On 9/26/19 12:18 PM, hong...@amazon.com wrote:
On 26/09/2019 11:39, Julien Grall wrote:
Hi,
NIT Title: Please remove full stop.
On 9/26/19 10:46 AM, hong...@amazon.com wrote:
From: Hongyan Xia
Hi Stefano,
On 9/26/19 2:25 AM, Stefano Stabellini wrote:
On Wed, 25 Sep 2019, Julien Grall wrote:
Hi,
On 25/09/2019 19:49, Stefano Stabellini wrote:
We don't have a clear way to know how many virtual SPIs we need for the
dom0-less domains. Introduce a new option under xen,domain to sp
benefits of updating state_entry_time.
I saw you discuss about it with Jan, so it would be nice to log at least
in the commit message the reason why this is done like that.
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https:/
Hi,
On 9/26/19 3:45 PM, Jürgen Groß wrote:
On 26.09.19 16:27, Julien Grall wrote:
Hi,
On 9/25/19 5:29 AM, Juergen Gross wrote:
vcpu_runstate_get() should never return a state entry time with
XEN_RUNSTATE_UPDATE set. To avoid this let update_runstate_area()
operate on a local runstate copy
xrealloc_flex_struct() helper macros
iommu/arm: Add lightweight iommu_fwspec support
iommu: Order the headers alphabetically in device_tree.c
iommu/arm: Introduce iommu_add_dt_device API
iommu/arm: Add Renesas IPMMU-VMSA support
This series is now merged.
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o, we should remove
it. With that gone:
Hmmm, yes it is.
Reviewed-by: Stefano Stabellini
Thank you!
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or to vcpu_runstate_info").
Reported-by: Andrew Cooper
Signed-off-by: Juergen Gross
Acked-by: Julien Grall
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document them.
This should help everyone to understand the purpose of the two
functions.
Signed-off-by: Julien Grall
---
I haven't done the 32-bits part yet. I wanted to gather feedback before
looking in details how to integrate that with Arm32.
---
xen/arch/arm/arm64/entry.S | 4 ++-
xen
Using alternative_if makes the code a bit more streamlined.
Take the opportunity to use the new auto-nop infrastructure to avoid
counting the number of nop in the else part for arch/arm/arm64/entry.S
Signed-off-by: Julien Grall
---
This is pretty much a matter of taste, but at least for
The macro alternative_if_not_cap is taking two parameters. The second
parameter is never used and it is hard to see how this can be used
correctly as it is only protecting the alternative section magic.
Signed-off-by: Julien Grall
---
xen/include/asm-arm/alternative.h | 4 +---
1 file changed
A follow-up patch will require to include insn.h from assembly code. So
wee need to protect any C-specific definition to avoid compilation
error when used in assembly code.
Signed-off-by: Julien Grall
---
xen/include/asm-arm/insn.h | 8
1 file changed, 8 insertions(+)
diff --git a/xen
est_vector' could used to generate the
two vectors and therefore take advantage of any change required in the
future.
Signed-off-by: Julien Grall
---
xen/arch/arm/arm64/entry.S | 12 ++--
1 file changed, 2 insertions(+), 10 deletions(-)
diff --git a/xen/arch/arm/arm64/entry.S b/xen
.
Cheers,
Cc: jgr...@suse.com
Julien Grall (9):
xen/arm64: entry: Introduce a macro to generate guest vector and use
it
xen/arm64: head: Check if an SError is pending when receiving a
vSError
xen/arm: traps: Rework entry/exit from the guest path
xen/arm: Ensure the SSBD workaround is
.
Signed-off-by: Julien Grall
---
I am not aware of any issues other than with the new vGIC. But I
haven't looked hard enough so I think it would be worth to try to fix it
for Xen 4.13.
---
xen/arch/arm/arm64/entry.S | 21 ++---
1 file changed, 14 insertions(+), 7 deletions(-)
arm64:
alternative: add auto-nop infrastructure". The only difference is the
nops macro added as not yet existing in Xen.
Signed-off-by: Mark Rutland
[will: use new nops macro to generate nop sequences]
Signed-off-by: Will Deacon
[julien: Add nops and port to Xen]
Signed-off-by: Julien Grall
Most of the guest vectors are using the same pattern. This makes fairly
tedious to alter the pattern and risk introducing mistakes when updating
each path.
A new macro is introduced to generate the guest vectors and now use it
in the one that use the open-code version.
Signed-off-by: Julien
At the moment, ARCH_PATCH_INSN_SIZE is defined in the header
livepatch.h. However, this is also used in the alternative code.
Rather than including livepatch.h just for using the define, move it in
the header insn.h which seems more suitable.
Signed-off-by: Julien Grall
---
xen/arch/arm
still passed as parameter to match the
rest of the C functions called from the entry path.
Fixes: a7898e4c59 ("xen/arm: Add ARCH_WORKAROUND_2 support for guests")
Reported-by: Andrii Anisov
Signed-off-by: Julien Grall
---
Note the Arm32 code has not been changed yet. I am also open on
The IOMMU share the page-tables with the P2M
+* which may have restrict the size further.
+*/
+ reg |= (64 - p2m_ipa_bits) << TTBCR_T0SZ_SHIFT;
switch (smmu->s2_output_size) {
case 32:
> #if 0
>
On 27/09/2019 12:45, Volodymyr Babchuk wrote:
Julien,
Hi...
Julien Grall writes:
At the moment, enter_hypervisor_head() and leave_hypervisor_tail() are
used to deal with actions to be done before/after any guest request is
handled.
While they are meant to work in pair, the former is
On 27/09/2019 12:56, Volodymyr Babchuk wrote:
Julien,
Hi...
Julien Grall writes:
At the moment, SSBD workaround is re-enabled for Xen after interrupts
are unmasked. This means we may end up to execute some part of the
hypervisor if an interrupt is received before the workaround is
re
Hi,
On 27/09/2019 13:11, Volodymyr Babchuk wrote:
Julien Grall writes:
Using alternative_if makes the code a bit more streamlined.
Take the opportunity to use the new auto-nop infrastructure to avoid
counting the number of nop in the else part for arch/arm/arm64/entry.S
Signed-off-by
;p2m_ipa_bits".
Signed-off-by: Oleksandr Tyshchenko
CC: Julien Grall
Reviewed-by: Julien Grall
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On 27/09/2019 13:35, Julien Grall wrote:
Hi,
On 27/09/2019 12:57, Oleksandr Tyshchenko wrote:
From: Oleksandr Tyshchenko
There is a strict requirement for the IOMMU which wants to share
the P2M table with the CPU. The IOMMU's Stage-2 input size must be equal
to the P2M IPA size. It is
Hi,
On 27/09/2019 13:27, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 12:45, Volodymyr Babchuk wrote:
Julien,
Hi...
Julien Grall writes:
At the moment, enter_hypervisor_head() and leave_hypervisor_tail() are
used to deal with actions to be done before/after any guest
a waste of memory.
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Hi,
On 27/09/2019 13:39, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 12:56, Volodymyr Babchuk wrote:
Julien Grall writes:
At the moment, SSBD workaround is re-enabled for Xen after interrupts
are unmasked. This means we may end up to execute some part of the
hypervisor if an
On 27/09/2019 14:33, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 13:39, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 12:56, Volodymyr Babchuk wrote:
Julien Grall writes:
At the moment, SSBD workaround is re-enabled for Xen after interrupts
are unmasked
Hi,
On 27/09/2019 15:21, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 14:33, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 13:39, Volodymyr Babchuk wrote:
Julien Grall writes:
On 27/09/2019 12:56, Volodymyr Babchuk wrote:
Julien Grall writes:
Or maybe, we
Hi,
On 27/09/2019 15:40, Oleksandr wrote:
>
> On 26.09.19 00:12, Julien Grall wrote:
>> On 25/09/2019 19:49, Stefano Stabellini wrote:
>>> Scan the user provided dtb fragment at boot. For each device node, map
>>> memory to guests, and route interrupts and setup
Hi,
On 27/09/2019 18:58, Volodymyr Babchuk wrote:
>
> Julien Grall writes:
>
>> Hi,
>>
>> On 27/09/2019 15:21, Volodymyr Babchuk wrote:
>>>
>>> Julien Grall writes:
>>>
>>>> On 27/09/2019 14:33, Volodymyr Babchuk wrote:
>&g
On 28/09/2019 00:52, Oleksandr Tyshchenko wrote:
> сб, 28 сент. 2019 г., 01:50 Stefano Stabellini <mailto:sstabell...@kernel.org>>:
>
> On Thu, 26 Sep 2019, Oleksandr wrote:
> > On 26.09.19 17:56, Julien Grall wrote:
> > >
Ack, I find it wrong that pci_uart_config sets the ps_bdf but not
ps_bdf_enable. From the description of the ps_bdf_enable field it
seems like ps_bdf is only valid if ps_bdf_enable is true, but that
doesn't seem to match pci_uart_config.
The chang
lue of
phandle_gic depending on user provided information.
For Dom0, initialize phandle_gic to dt_interrupt_controller->phandle
(current value) at the beginning of prepare_dtb.
Signed-off-by: Stefano Stabellini
Acked-by: Julien Grall
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into a GPLv2 code base.
The result is GPLv2 code.
Signed-off-by: Stefano Stabellini
Acked-by: Julien Grall
Cheers,
Changes in v6:
- code style
- in-code comment
- commit message improvements
Changes in v5:
- code style
- in-code comment
- remove depth parameter f
@@ void __init create_domUs(void)
panic("Missing property 'cpus' for domain %s\n",
dt_node_name(node));
+if ( dt_find_compatible_node(node, NULL, "multiboot,device-tree") )
+d_cfg.flags |= XEN_DOMCTL_CDF_iommu;
+
d = dom
off-by: Stefano Stabellini
Reviewed-by: Volodymyr Babchuk
Acked-by: Julien Grall
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Hi,
Sorry, I am picking up this series again.
On 4/18/19 7:03 PM, Stefano Stabellini wrote:
On Wed, 17 Apr 2019, Julien Grall wrote:
Hi,
On 4/17/19 9:45 PM, Stefano Stabellini wrote:
On Wed, 27 Mar 2019, Julien Grall wrote:
Clang understands the GCCism in use here, but still complains that
Hi all,
This small patch series is here to avoid an implicit conversion from ULL to UL
when building with Arm32 (see patch #1). This patch is candidate for Xen 4.13.
The second patch is only a coding style fix. So could be deferred to next.
Cheers,
Cc: Juergen Gross
Julien Grall (2):
xen
Signed-off-by: Julien Grall
---
xen/arch/arm/domain_build.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index b791e4b512..268e074af7 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
er
tot_size to "paddr_t".
Signed-off-by: Julien Grall
---
Cc: Juergen Gross
I am not aware of any users trying to allocate more than 4GB VM for
32-bit (there more it is in the dom0less path). Nonetheless, it
would be best to fix it as soon as possible.
Only
Signed-off-by: Julien Grall
---
xen/arch/arm/p2m.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 5ff6ce15f6..4a429dc1be 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -25,7 +25,7 @@ static unsigned int __read_mostly
: Oleksandr Tyshchenko
Acked-by: Julien Grall
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ou would be if they don't
use interrupts.
So I think we need a couple of more changes:
1) Introduce an option to allow the user to ignore IOMMU issues (something
like "xen,force-assign-without-iommu").
2) "xen,reg" cannot be specified without "xen,path". This
On 30/09/2019 13:14, Volodymyr Babchuk wrote:
Hi Julien,
Julien Grall writes:
At the moment, SSBD workaround is re-enabled for Xen after interrupts
are unmasked. This means we may end up to execute some part of the
hypervisor if an interrupt is received before the workaround is
re-enabled
I will soon lose access to my Arm e-mail address. Update it to
jul...@xen.org
Signed-off-by: Julien Grall
Cc: jul...@xen.org
---
MAINTAINERS | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 718f0a4ca1..1d247231d6 100644
--- a/MAINTAINERS
On 30/09/2019 17:48, Paul Durrant wrote:
-Original Message-
From: Xen-devel On Behalf Of Julien
Grall
Sent: 30 September 2019 17:45
To: xen-devel@lists.xenproject.org
Cc: jgr...@suse.com; jul...@xen.org; Julien Grall ;
volodymyr_babc...@epam.com
Subject: [Xen-devel] [PATCH] Update
I will soon lose access to my Arm e-mail address. Update it to
jul...@xen.org
Signed-off-by: Julien Grall
Cc: jul...@xen.org
---
Changes in v2:
- Use the correct e-mail address
---
MAINTAINERS | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b
I will soon lose access to my Arm e-mail address. Update it to
jul...@xen.org
Signed-off-by: Julien Grall
Cc: jul...@xen.org
---
Changes in v2:
- Use the correct e-mail address
---
MAINTAINERS | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/MAINTAINERS b
o
create the initial mask with pdx_init_mask(4GB) or pdx_init_mask(1GB)
(I.e the maximum contiguous range the buddy allocator can allocate).
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sted. So it might be possible there might
be some issues with it.
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e accessed anymore.
Wei, how do you deal with counters in init.data on x86?
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Hi Wei,
On 5/3/19 12:08 PM, Wei Liu wrote:
On Thu, May 02, 2019 at 09:43:17PM +0100, Julien Grall wrote:
(+ Wei)
On 5/2/19 5:55 PM, Viktor Mitin wrote:
Hi Julien,
Hi,
Please find trace log below:
root@h3ulcb:~# xencov reset
(XEN) Data Abort Trap. Syndrome=0x7
(XEN) Walking Hypervisor VA
Hi,
On 03/05/2019 14:41, Wei Liu wrote:
On Fri, May 03, 2019 at 02:35:08PM +0100, Julien Grall wrote:
Hi Wei,
On 5/3/19 12:08 PM, Wei Liu wrote:
On Thu, May 02, 2019 at 09:43:17PM +0100, Julien Grall wrote:
(+ Wei)
On 5/2/19 5:55 PM, Viktor Mitin wrote:
Hi Julien,
Hi,
Please find
On 03/05/2019 16:56, Andrii Anisov wrote:
Hello Julien,
On 22.04.19 19:49, Julien Grall wrote:
The newly introduced macro _BITUL makes the code more readable.
Signed-off-by: Julien Grall
---
xen/include/asm-arm/processor.h | 18 +-
1 file changed, 9 insertions(+), 9
Hi,
On 03/05/2019 16:56, Andrii Anisov wrote:
On 22.04.19 19:49, Julien Grall wrote:
/* HCR Hyp Configuration Register */
#define HCR_RW (_AC(1,UL)<<31) /* Register Width, ARM64 only */
Resolution of the dispute with Jan about [PATCH 01/20] is required first.
I
On 03/05/2019 16:56, Andrii Anisov wrote:
Hello Julien,
On 22.04.19 19:49, Julien Grall wrote:
None of the parameters of secondary_start are actually used. So turn
secondary_start to a function with no parameters.
Also modify the assembly code to avoid setting-up the registers before
Hi,
On 03/05/2019 16:56, Andrii Anisov wrote:
On 22.04.19 19:49, Julien Grall wrote:
The parameter cpuid is not used by start_xen. So remove it.
Signed-off-by: Julien Grall
---
xen/arch/arm/arm32/head.S | 1 -
xen/arch/arm/arm64/head.S | 1 -
xen/arch/arm/setup.c | 3 +--
3 files
On 03/05/2019 16:57, Andrii Anisov wrote:
Hello Julien,
On 22.04.19 19:49, Julien Grall wrote:
The boot code is using r2 and r3 to hold the page-table entry value.
While r2 is always updated before storing the value, this is not always
the case for r3.
Thankfully today, r3 will always be
On 03/05/2019 16:57, Andrii Anisov wrote:
Hello Julien,
Hi,
On 22.04.19 19:49, Julien Grall wrote:
The page-table walker is configured to use the same shareability and
cacheability as the access performed when updating the page-tables. This
means cleaning the cache for CPU0 domheap is
On 03/05/2019 16:58, Andrii Anisov wrote:
On 22.04.19 19:49, Julien Grall wrote:
We currently use the very long version __attribute__((__aligned(4096)))
to align page-tables. Thankfully there is a shorter version to make
IMO it is better to change `version` to `macro`. In order to specify
On 03/05/2019 16:59, Andrii Anisov wrote:
Hello Julien,
Hi,
On 22.04.19 19:49, Julien Grall wrote:
The function create_xen_entries may be concurrently called. So we need
to protect with a spinlock to avoid corruption the page-tables.
The question from me is why didn't we step into
or capping the
init mask?
Note that the later will not produce the same behavior as this patch.
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On 5/6/19 9:20 AM, Andrii Anisov wrote:
Hello Julien,
On 03.05.19 20:19, Julien Grall wrote:
TLDR; because xen page-tables are not that often modified after boot.
Yet it is still possible to race.
At the moment, create_xen_entries() can only modify the VA range 0 -
2GB. In that range, we
ge in between.
It is not unrelated, the patch is necessary to make this patch works.
Otherwise you will hit the ASSERT(mfn_eq(mfn, INVALID_MFN)) after one
iteration.
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value to initialize the PDX mask
with a base address. I would be more keen to implement pdx_init_mask() as:
return fill_mask(((uint64_t)PAGE_SIZE << MAX_ORDER - 1);
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e any real value to initialize the PDX mask
with a base address. I would be more keen to implement pdx_init_mask() as:
return fill_mask(((uint64_t)PAGE_SIZE << MAX_ORDER - 1);
But (besides the missing closing parenthese) that's not what x86 wants.
Could you remind me why?
Cheers
l?
In any event
Acked-by: Jan Beulich
Just to keep everyone aware, I kept this patch as is with the 2 acked-by
and provided a separate patch to move the helpers in common code under
!CONFIG_HAVE_M2P.
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This patch rework all the arch specific macros in grant_table.h to use
the typesafe MFN/GFN.
At the same time, some functions are renamed s/gmfn/gfn/ to match the
current naming scheme (see include/mm.h).
No functional changes intended.
Signed-off-by: Julien Grall
Acked-by: Jan Beulich
looking at the code, I also continued to convert some code to use
typesafe MFN/GFN.
Cheers,
Julien Grall (14):
xen/arm: Use mfn_to_pdx instead of pfn_to_pdx when possible
xen/x86: Constify the parameter "d" in mfn_to_gfn
xen/x86: Make mfn_to_gfn typesafe
xen/x86: Use mfn_to_gfn r
On x86, mfn_to_gmfn can be replaced with mfn_to_gfn. On Arm, there are
no more call to mfn_to_gmfn, so the helper can be dropped.
At the same time rework a comment in Arm code that does not make sense.
Signed-off-by: Julien Grall
Acked-by: Jan Beulich
Acked-by: Stefano Stabellini
to use typesafe GFN and
format the message correctly.
No functional changes.
Signed-off-by: Julien Grall
--
Changes in v2:
- mfn_to_gfn now returns a gfn_t
- Use %pd and PRI_gfn when possible in the message
- Don't split format string to help grep/ack.
---
xen
mfn_to_pdx adds more safety than pfn_to_pdx. Replace all but on place in
the Arm code to use the former.
No functional changes.
Signed-off-by: Julien Grall
---
There are still one use of pfn_to_pdx in the Arm code (see
mfn_valid). Ideally we would want to switch __mfn_valid(...) to be
At the moment, Arm is providing a dummy implementation for the M2P
helpers used in common code. However, they are quite isolated and could
be used by other architecture in the future. So move all the helpers in
xen/mm.h.
Signed-off-by: Julien Grall
---
Changes in v2:
- Patch added
No functional changes.
Signed-off-by: Julien Grall
Reviewed-by: Jan Beulich
Acked-by: Stefano Stabellini
---
Changes in v2:
- Fix coding style
- Merge the declaration for gpfn and old_gpfn
- Don't open-code mfn_valid
- Add Jan's reviewed-by
Convert online_page, offline_page and query_page_offline to use
typesafe MFN.
Note, for clarity, the words have been re-ordered in the error message
updated by this patch.
No functional changes.
Signed-off-by: Julien Grall
Acked-by: Jan Beulich
---
Changes:
- Update error message
ninfo: A new helper is introduced to wrap the call to
mfn_to_gfn/mfn_to_gmfn. For Arm, it returns an invalid GFN so the mapping
will fail.
[1] https://patchwork.kernel.org/patch/9719913/
Signed-off-by Julien Grall
---
Cc: oleksandr_tyshche...@epam.com
Cc: andrii_ani...@epam.com
Chang
No functional changes intended.
Signed-off-by: Julien Grall
---
Changes in v2:
- Patch added
---
xen/arch/x86/mm/p2m.c | 2 +-
xen/arch/x86/mm/shadow/common.c | 31 ++-
xen/arch/x86/mm/shadow/multi.c | 4 ++--
xen/include/asm-x86/p2m.h
have not been converted to use typesafe PFN because it was requiring
more changes than expected.
Signed-off-by: Julien Grall
---
Changes in v2:
- Patch added
---
xen/arch/x86/cpu/mcheck/mcaction.c | 2 +-
xen/arch/x86/mm.c | 14
xen/arch/x86/mm
The parameter "d" holds the domain and is not modified by the function.
So constify it.
Signed-off-by: Julien Grall
Reviewed-by: Jan Beulich
---
Changes in v2:
- Fix function name in the title
- Add Jan's reviewed-by
---
xen/include/asm-x86/p2m.h | 2 +-
1
On 4/24/19 1:19 PM, Julien Grall wrote:
Hi,
I haven't seen any answer from Gang Wei. I assume this is fine.
I will queue this patch in my branch next-4.13.
Looking again the thread, we still need an ack from Shane Wang before
this can go in.
Sorry for the confusion.
Cheers,
--
J
No functional changes.
Signed-off-by: Julien Grall
Reviewed-by: Jan Beulich
Acked-by: Stefano Stabellini
---
Changes in v2:
- Add Jan's reviewed-by
- Add Stefano's acked-by
---
xen/arch/x86/tboot.c | 2 +-
xen/common/page_alloc.c | 2 +-
xen/include/asm-ar
function, the extern
variable dom_cow should be defined earlier on. For convenience, the
definition of all dom_* variables are moved earlier on.
Signed-off-by: Julien Grall
---
Changes in v2:
- Patch added
---
xen/include/asm-x86/mm.h | 29 +++--
1 file changed, 15
The third parameter of update_intpte() is a MFN, so it can be switched
to use the typesafe.
At the same time, the typesafe is propagated as far as possible without
major modifications.
Signed-off-by: Julien Grall
---
Changes in v2:
- Patch added
---
xen/arch/x86/mm.c
Hi,
On 4/30/19 12:00 PM, Oleksandr wrote:
On 29.04.19 17:29, Julien Grall wrote:
Hi Oleksandr,
Hi Julien
---
docs/misc/arm/early-printk.txt | 6 ++
xen/arch/arm/Rules.mk | 7 +++
xen/arch/arm/arm32/debug-scif.inc | 13 +
3 files changed, 22
x27;:
CONFIG_EARLY_PRINTK=scif,0xe6c4,A
Signed-off-by: Oleksandr Tyshchenko
CC: Julien Grall
Acked-by: Julien Grall
Cheers,
--
Julien Grall
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wording here before it gets merged.
Cheers,
--
Julien Grall
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lien.gr...@arm.com>).
Signed-off-by: Jan Beulich
The common code looks fine to me. I will leave Andrew commenting for the
x86 parts:
Acked-by: Julien Grall
Cheers,
--
Julien Grall
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https:/
ck look at libxc, it seems the padding field will not be
initialized to 0 (aka MEMORY_DEFAULT_POLICY). As the libxc support is
added in a follow-up patch, I think you want to ensure memory_policy is
equal to MEMORY_DEFAULT_POLICY in libxc. So there are no unexpected
behavior during bisection or this
void *data);
+ int node, int depth,
+ device_tree_node_func func,
+ void *data);
/**
* dt_unflatten_host_device_tree - Unflatten the host device tree
Cheers,
--
Julien Grall
e, name, address_cells, size_cells);
diff --git a/xen/include/asm-arm/setup.h b/xen/include/asm-arm/setup.h
index 48187e1..5c3fc2d 100644
--- a/xen/include/asm-arm/setup.h
+++ b/xen/include/asm-arm/setup.h
@@ -66,6 +66,7 @@ struct bootcmdlines {
struct bootinfo {
struct meminf
if ( r_e )
+return r_e;
+
+return consider_modules(s, r_s, size, align, i+1);
Same here.
+}
+}
return e;
}
#endif
Cheers,
--
Julien Grall
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