>>> On 02.03.18 at 18:23, wrote:
> On 02/03/18 17:04, Jan Beulich wrote:
> On 02.03.18 at 17:53, wrote:
>>> On 02/03/18 14:34, Jan Beulich wrote:
Note that the removed BUILD_BUG_ON()s don't get replaced by anything -
there already is a suitable ASSERT() in xen.lds.S.
>>> This isn't
>>> On 02.03.18 at 18:33, wrote:
> On 02/03/18 14:35, Jan Beulich wrote:
>> Other than for the main mappings, don't even do this in release builds,
>> as there are no huge page shattering concerns here.
>>
>> Signed-off-by: Jan Beulich
>
> Acked-by: Andrew Cooper , although I think
> somewhere (
On Fri, 2018-03-02 at 16:19 +, Roger Pau Monne wrote:
> Commit 406817 doesn't update nested VMX code in order to take into
> account L1 CR4 host mask when nested guest (L2) writes to CR4, and
> thus the mask written to CR4_GUEST_HOST_MASK is likely not as
> restrictive as it should be.
>
> Als
>>> On 02.03.18 at 20:34, wrote:
> On 02/03/18 07:10, Jan Beulich wrote:
> On 01.03.18 at 17:58, wrote:
>>> The pont of having the toolchain put out optimised nops is to avoid the
>>> need for us to patch the site at all. I.e. calling optimise_nops() on a
>>> set of toolchain nops defeats th
>>> On 28.02.18 at 17:47, wrote:
> On 28/02/18 13:51, Jan Beulich wrote:
>> 1: remove page.h and processor.h inclusion from asm_defns.h
>> 2: use PDEP for PTE flags insertion when available
>> 3: use PDEP/PEXT for maddr/direct-map-offset conversion when available
>> 4: use PDEP/PEXT for PFN/PDX co
>>> On 02.03.18 at 18:01, wrote:
> On 02/03/18 16:47, Jan Beulich wrote:
> On 02.03.18 at 17:23, wrote:
>>> +static inline void invpcid(unsigned int pcid, unsigned long addr,
>>> + unsigned int type)
>>> +{
>>> +struct {
>>> +uint64_t pcid:12;
>>> +
>>> On 02.03.18 at 19:58, wrote:
> This causes objdump not to try and disassemble the data.
>
> While altering this area, switch to using .balign, and fill with 0xc2 to help
> highlight the embedded padding (rather than having it filled with 0f 1f 40 00
> which is a long nop). Also, shorten the
flight 120197 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120197/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-qemuu-rhel6hvm-intel 12 guest-start/redhat.repeat fail REGR.
vs. 115539
test-amd64-am
On Wed, Feb 21, 2018 at 10:03:39AM +0200, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> Implement essential initialization of the display driver:
> - introduce required data structures
> - handle DRM/KMS driver registration
> - perform basic DRM driver initialization
>
>>> On 02.03.18 at 21:54, wrote:
> The start info structure that is defined as part of the x86/HVM direct boot
> ABI and used for starting Xen PVH guests would be more versatile if it also
> included a way to pass information about the memory map to the guest. This
> would allow KVM guests to shar
On 03/05/2018 11:13 AM, Daniel Vetter wrote:
On Wed, Feb 21, 2018 at 10:03:39AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Implement essential initialization of the display driver:
- introduce required data structures
- handle DRM/KMS driver registration
- per
On Wed, Feb 21, 2018 at 10:03:40AM +0200, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> Implement kernel modesetiing/connector handling using
> DRM simple KMS helper pipeline:
>
> - implement KMS part of the driver with the help of DRM
> simple pipepline helper which is po
On Wed, Feb 21, 2018 at 10:03:42AM +0200, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> Handle communication with the backend:
> - send requests and wait for the responses according
>to the displif protocol
> - serialize access to the communication channel
> - time-out
>>> On 27.02.18 at 15:50, wrote:
> -compat_create_bounce_frame:
> -ASSERT_INTERRUPTS_ENABLED
> -mov %fs,%edi
> -ASM_STAC
> -testb $2,UREGS_cs+8(%rsp)
> -jz1f
> -/* Push new frame at registered guest-OS stack base. */
> -movl VCPU_kerne
On 03/05/2018 11:25 AM, Daniel Vetter wrote:
On Wed, Feb 21, 2018 at 10:03:42AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Handle communication with the backend:
- send requests and wait for the responses according
to the displif protocol
- serialize access to
On Wed, Feb 21, 2018 at 10:03:41AM +0200, Oleksandr Andrushchenko wrote:
> From: Oleksandr Andrushchenko
>
> Implement GEM handling depending on driver mode of operation:
> depending on the requirements for the para-virtualized environment, namely
> requirements dictated by the accompanying DRM/(
Signed-off-by: Wei Liu
---
xen/arch/x86/setup.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index ac530ece2c..89e42865a4 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(
Signed-off-by: Wei Liu
---
xen/arch/x86/flushtlb.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 8a7a76b8ff..e4ea4f3297 100644
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -9,6
Wei Liu (2):
x86: report if PCID and INVPCID are supported
x86: use invpcid to do global flushing
xen/arch/x86/flushtlb.c | 22 ++
xen/arch/x86/setup.c| 7 +++
2 files changed, 25 insertions(+), 4 deletions(-)
--
2.11.0
On 05/03/18 10:50, Wei Liu wrote:
> Signed-off-by: Wei Liu
Reviewed-by: Juergen Gross
Juergen
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On 05/03/18 10:50, Wei Liu wrote:
> Signed-off-by: Wei Liu
Reviewed-by: Juergen Gross
Juergen
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On 02/23/2018 05:08 PM, Ross Lagerwall wrote:
gas prior to binutils commit fbdf9406b0 (appears in 2.27) outputs symbol
table entries resulting from .file in reverse order. If we get two
consecutive file symbols, prefer the first one if that names an object
file or has a directory component (to co
On Fri, Mar 02, 2018 at 04:39:59PM +0100, Lars Kurth wrote:
> Hi all,
> (sorry for the extensive distribution list - I went through MAINTAINERS and
> people who may have an interest)
>
> I would like to start organizing a recurring x86 community call to discuss
> and sync-up on upcoming features
>>> On 05.03.18 at 10:50, wrote:
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(unsigned long mbi_p)
> cpu_has_nx ? XENLOG_INFO : XENLOG_WARNING "Warning: ",
> cpu_has_nx ? "" : "not ");
>
> +
> +pri
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/i386/ich9.h | 2 +-
hw/i386/acpi-build.c | 4 ++--
hw/i386/pc.c
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Gerd Hoffmann
---
hw/display/cirrus_vga.c | 9 -
hw/display/g364fb.c
It eases code review, unit is explicit.
Patch generated using:
$ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/
and modified manually.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alan Robinson
---
hw/block/xen_disk.c| 4 ++--
hw/xenpv/xen_domainbuil
On Mon, Mar 05, 2018 at 04:20:48AM -0700, Jan Beulich wrote:
> >>> On 05.03.18 at 10:50, wrote:
> > --- a/xen/arch/x86/setup.c
> > +++ b/xen/arch/x86/setup.c
> > @@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(unsigned long mbi_p)
> > cpu_has_nx ? XENLOG_INFO : XENLOG_WARNING "
>>> On 05.03.18 at 10:50, wrote:
> Signed-off-by: Wei Liu
No description at all? I'd at least expect mention of how much of a
performance win this is (for whichever hardware you happen to
know that).
> @@ -120,11 +121,24 @@ unsigned int flush_area_local(const void *va, unsigned
> int flags)
>
Roger Pau Monne writes ("[PATCH] xl: remove apic option for PVH guests"):
> XSA-256 forces the local APIC to always be enabled for PVH guests, so
> ignore any apic option for PVH guests. Update the documentation
> accordingly.
...
> diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c
> index f68
Add an option to control when vTSC emulation will be activated for a
domU with tsc_mode=default. Without such option each TSC access from
domU will be emulated, which causes a significant perfomance drop for
workloads that make use of rdtsc.
Add a new domctl XEN_DOMCTL_set_vtsc_khz_tolerance to ad
On 05/03/18 12:20, Jan Beulich wrote:
On 05.03.18 at 10:50, wrote:
>> --- a/xen/arch/x86/setup.c
>> +++ b/xen/arch/x86/setup.c
>> @@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(unsigned long mbi_p)
>> cpu_has_nx ? XENLOG_INFO : XENLOG_WARNING "Warning: ",
>> c
On 05/03/18 11:31, Wei Liu wrote:
> On Mon, Mar 05, 2018 at 04:20:48AM -0700, Jan Beulich wrote:
> On 05.03.18 at 10:50, wrote:
>>> --- a/xen/arch/x86/setup.c
>>> +++ b/xen/arch/x86/setup.c
>>> @@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(unsigned long mbi_p)
>>> cpu_has
On 05/03/18 11:31, Jan Beulich wrote:
On 05.03.18 at 10:50, wrote:
>> Signed-off-by: Wei Liu
> No description at all? I'd at least expect mention of how much of a
> performance win this is (for whichever hardware you happen to
> know that).
>
>> @@ -120,11 +121,24 @@ unsigned int flush_area_
On 05/03/18 12:50, Andrew Cooper wrote:
> On 05/03/18 11:31, Jan Beulich wrote:
> On 05.03.18 at 10:50, wrote:
>>> Signed-off-by: Wei Liu
>> No description at all? I'd at least expect mention of how much of a
>> performance win this is (for whichever hardware you happen to
>> know that).
>>
>
On Thu, 15 Feb 2018 01:28:38 -0300
Philippe Mathieu-Daudé wrote:
> It ease code review, unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
[...]
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index deb440f286..9ccc6192b5 100644
> --- a/hw/i386/acpi-build.c
> +++ b/
On 05/03/18 12:06, Juergen Gross wrote:
> On 05/03/18 12:50, Andrew Cooper wrote:
>> On 05/03/18 11:31, Jan Beulich wrote:
>> On 05.03.18 at 10:50, wrote:
Signed-off-by: Wei Liu
>>> No description at all? I'd at least expect mention of how much of a
>>> performance win this is (for which
>>> On 05.03.18 at 12:43, wrote:
> On 05/03/18 12:20, Jan Beulich wrote:
> On 05.03.18 at 10:50, wrote:
>>> --- a/xen/arch/x86/setup.c
>>> +++ b/xen/arch/x86/setup.c
>>> @@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(unsigned long mbi_p)
>>> cpu_has_nx ? XENLOG_INFO : XEN
flight 120209 linux-4.9 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/120209/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-raw broken in 120137
test-amd64-i
On 05/03/18 13:37, Jan Beulich wrote:
On 05.03.18 at 12:43, wrote:
>> On 05/03/18 12:20, Jan Beulich wrote:
>> On 05.03.18 at 10:50, wrote:
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -1701,6 +1701,13 @@ void __init noreturn __start_xen(unsigned long
mbi
>>> On 05.03.18 at 13:35, wrote:
> On 05/03/18 12:06, Juergen Gross wrote:
>> On 05/03/18 12:50, Andrew Cooper wrote:
>>> On 05/03/18 11:31, Jan Beulich wrote:
>>> On 05.03.18 at 10:50, wrote:
> Signed-off-by: Wei Liu
No description at all? I'd at least expect mention of how much of
>>> On 05.03.18 at 13:49, wrote:
> On 05/03/18 13:37, Jan Beulich wrote:
> On 05.03.18 at 12:43, wrote:
>>> On 05/03/18 12:20, Jan Beulich wrote:
>>> On 05.03.18 at 10:50, wrote:
> --- a/xen/arch/x86/setup.c
> +++ b/xen/arch/x86/setup.c
> @@ -1701,6 +1701,13 @@ void __init no
On 05/03/18 12:54, Jan Beulich wrote:
On 05.03.18 at 13:35, wrote:
>> On 05/03/18 12:06, Juergen Gross wrote:
>>> On 05/03/18 12:50, Andrew Cooper wrote:
On 05/03/18 11:31, Jan Beulich wrote:
On 05.03.18 at 10:50, wrote:
>> Signed-off-by: Wei Liu
> No description at al
On 03/05/2018 11:23 AM, Daniel Vetter wrote:
On Wed, Feb 21, 2018 at 10:03:40AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Implement kernel modesetiing/connector handling using
DRM simple KMS helper pipeline:
- implement KMS part of the driver with the help of DRM
On Mon, 5 Mar 2018 13:29:15 +0100
Igor Mammedov wrote:
> On Thu, 15 Feb 2018 01:28:38 -0300
> Philippe Mathieu-Daudé wrote:
>
> > It ease code review, unit is explicit.
> >
> > Signed-off-by: Philippe Mathieu-Daudé
> > ---
> [...]
>
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-buil
On 05/03/18 13:57, Andrew Cooper wrote:
> On 05/03/18 12:54, Jan Beulich wrote:
> On 05.03.18 at 13:35, wrote:
>>> On 05/03/18 12:06, Juergen Gross wrote:
On 05/03/18 12:50, Andrew Cooper wrote:
> On 05/03/18 11:31, Jan Beulich wrote:
> On 05.03.18 at 10:50, wrote:
>>> Si
>>> On 05.03.18 at 12:35, wrote:
One thing I'm missing in the description (or the added documentation)
is a discussion of the conditions under which it is safe to make use of
the new setting.
> @@ -954,11 +955,21 @@ long arch_do_domctl(
> tsc_set_info(d, domctl->u.tsc_info.tsc_mode,
>>> On 05.03.18 at 14:11, wrote:
> On 05/03/18 13:57, Andrew Cooper wrote:
>> When we start using PCID for user mappings, then we don't need them to
>> be global, at which point we can require/expect that the only global
>> mappings are hypervisor ones which we expect to remain correct across a
>>
On Mon, Mar 05, 2018 at 05:57:48AM -0700, Jan Beulich wrote:
> >>> On 05.03.18 at 13:49, wrote:
> > On 05/03/18 13:37, Jan Beulich wrote:
> > On 05.03.18 at 12:43, wrote:
> >>> On 05/03/18 12:20, Jan Beulich wrote:
> >>> On 05.03.18 at 10:50, wrote:
> > --- a/xen/arch/x86/setup.c
> >
Hi Jan,
On 02/03/18 15:11, Jan Beulich wrote:
On 02.03.18 at 15:44, wrote:
On 02/03/18 14:42, Jan Beulich wrote:
On 21.02.18 at 15:02, wrote:
A few files override page_to_mfn/mfn_to_page but actually never use
those macros. So drop them.
Signed-off-by: Julien Grall
It doesn't look like
On Mon, Mar 05, 2018 at 06:24:37AM -0700, Jan Beulich wrote:
> >>> On 05.03.18 at 14:11, wrote:
> > On 05/03/18 13:57, Andrew Cooper wrote:
> >> When we start using PCID for user mappings, then we don't need them to
> >> be global, at which point we can require/expect that the only global
> >> map
On 28/02/18 12:58, Jan Beulich wrote:
You're missing a SoB on this version of the patch, but assuming that
gets fixed, Acked-by: Andrew Cooper
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -7306,6 +7325,11 @@ x86_emulate(
> op_bytes =
On 05/03/18 13:31, Wei Liu wrote:
> On Mon, Mar 05, 2018 at 06:24:37AM -0700, Jan Beulich wrote:
> On 05.03.18 at 14:11, wrote:
>>> On 05/03/18 13:57, Andrew Cooper wrote:
When we start using PCID for user mappings, then we don't need them to
be global, at which point we can require/
Hi Jan,
On 02/03/18 14:55, Jan Beulich wrote:
On 22.02.18 at 17:55, wrote:
On 22/02/18 16:51, Wei Liu wrote:
On Thu, Feb 22, 2018 at 04:40:04PM +, Julien Grall wrote:
On 22/02/18 16:35, Wei Liu wrote:
On Wed, Feb 21, 2018 at 02:02:51PM +, Julien Grall wrote:
The function populate_p
>>> On 05.03.18 at 14:31, wrote:
> On Mon, Mar 05, 2018 at 06:24:37AM -0700, Jan Beulich wrote:
>> >>> On 05.03.18 at 14:11, wrote:
>> > On 05/03/18 13:57, Andrew Cooper wrote:
>> >> When we start using PCID for user mappings, then we don't need them to
>> >> be global, at which point we can requ
On 03/05/2018 11:32 AM, Daniel Vetter wrote:
On Wed, Feb 21, 2018 at 10:03:41AM +0200, Oleksandr Andrushchenko wrote:
From: Oleksandr Andrushchenko
Implement GEM handling depending on driver mode of operation:
depending on the requirements for the para-virtualized environment, namely
requireme
>>> On 05.03.18 at 14:43, wrote:
> On 02/03/18 14:55, Jan Beulich wrote:
> On 22.02.18 at 17:55, wrote:
>>> On 22/02/18 16:51, Wei Liu wrote:
On Thu, Feb 22, 2018 at 04:40:04PM +, Julien Grall wrote:
> On 22/02/18 16:35, Wei Liu wrote:
>> On Wed, Feb 21, 2018 at 02:02:51PM +0
Hi,
On 02/03/18 15:06, Jan Beulich wrote:
On 21.02.18 at 15:02, wrote:
--- a/xen/arch/x86/x86_64/mm.c
+++ b/xen/arch/x86/x86_64/mm.c
@@ -40,6 +40,10 @@ asm(".file \"" __FILE__ "\"");
#include
#include
+/* Override macros from asm/page.h to make them work with mfn_t */
+#undef page_to
Hi Jan,
On 05/03/18 14:00, Jan Beulich wrote:
On 05.03.18 at 14:43, wrote:
On 02/03/18 14:55, Jan Beulich wrote:
On 22.02.18 at 17:55, wrote:
On 22/02/18 16:51, Wei Liu wrote:
On Thu, Feb 22, 2018 at 04:40:04PM +, Julien Grall wrote:
On 22/02/18 16:35, Wei Liu wrote:
On Wed, Feb 21,
On 28/02/18 12:58, Jan Beulich wrote:
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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Hi Jan,
On 02/03/18 15:34, Jan Beulich wrote:
On 21.02.18 at 15:02, wrote:
@@ -95,11 +101,18 @@ static unsigned int max_order(const struct domain *d)
return min(order, MAX_ORDER + 0U);
}
+/* Helper to copy a typesafe MFN to guest */
+#define copy_mfn_to_guest(hnd, off, mfn)
Am Mon, 05 Mar 2018 06:18:17 -0700
schrieb "Jan Beulich" :
> >>> On 05.03.18 at 12:35, wrote:
>
> One thing I'm missing in the description (or the added documentation)
> is a discussion of the conditions under which it is safe to make use of
> the new setting.
The same rules as tsc_mode=nativ
>>> On 05.03.18 at 15:11, wrote:
> On 05/03/18 14:00, Jan Beulich wrote:
> On 05.03.18 at 14:43, wrote:
>>> Anyway, I don't have much knowledge on the x86 to make the modification
>>> that you suggested. So I am going to revert to _mfn(0) for x86.
>>
>> I'd prefer if you didn't, but well, it
>>> On 05.03.18 at 15:07, wrote:
> On 02/03/18 15:06, Jan Beulich wrote:
> On 21.02.18 at 15:02, wrote:
>>> --- a/xen/arch/x86/x86_64/mm.c
>>> +++ b/xen/arch/x86/x86_64/mm.c
>>> @@ -40,6 +40,10 @@ asm(".file \"" __FILE__ "\"");
>>> #include
>>> #include
>>>
>>> +/* Override macros fr
On Tue, Jan 23, 2018 at 03:22:40PM +, Ross Lagerwall wrote:
> The recently added support for restricting QEMU prevents use of the VGA
> console. This series addresses that by adding a couple of new dmops.
> A corresponding patch for QEMU is needed to make use of the new dmops.
Hi Ross,
Is the
>>> On 05.03.18 at 15:18, wrote:
> On 02/03/18 15:34, Jan Beulich wrote:
> On 21.02.18 at 15:02, wrote:
>>> @@ -95,11 +101,18 @@ static unsigned int max_order(const struct domain *d)
>>> return min(order, MAX_ORDER + 0U);
>>> }
>>>
>>> +/* Helper to copy a typesafe MFN to guest */
On 3/2/18 5:29 AM, Jan Beulich wrote:
On 02.03.18 at 12:09, wrote:
>> On Thu, Mar 01, 2018 at 05:01:55PM +, Roger Pau Monné wrote:
>>> On Thu, Mar 01, 2018 at 04:01:23PM +, Wei Liu wrote:
On Thu, Mar 01, 2018 at 03:57:18PM +, Andrew Cooper wrote:
> On 01/03/18 12:22, Wei
Hi,
On 05/03/18 14:39, Jan Beulich wrote:
On 05.03.18 at 15:07, wrote:
On 02/03/18 15:06, Jan Beulich wrote:
On 21.02.18 at 15:02, wrote:
--- a/xen/arch/x86/x86_64/mm.c
+++ b/xen/arch/x86/x86_64/mm.c
@@ -40,6 +40,10 @@ asm(".file \"" __FILE__ "\"");
#include
#include
+/* Overrid
>>> On 05.03.18 at 15:18, wrote:
> Am Mon, 05 Mar 2018 06:18:17 -0700
> schrieb "Jan Beulich" :
>
>> >>> On 05.03.18 at 12:35, wrote:
>> > +case XEN_DOMCTL_set_vtsc_khz_tolerance:
>> > +if ( d == currd )
>> > +ret = -EINVAL;
>> Why? There's e.g. no domain_pause() invo
On 03/05/2018 02:45 PM, Jan Beulich wrote:
On 05.03.18 at 15:18, wrote:
>> Am Mon, 05 Mar 2018 06:18:17 -0700
>> schrieb "Jan Beulich" :
>>
>> On 05.03.18 at 12:35, wrote:
+case XEN_DOMCTL_set_vtsc_khz_tolerance:
+if ( d == currd )
+ret = -EINVAL;
>>> On 05.03.18 at 14:39, wrote:
> On 28/02/18 12:58, Jan Beulich wrote:
>
> You're missing a SoB on this version of the patch, but assuming that
> gets fixed, Acked-by: Andrew Cooper
Thanks and - oops, I had dropped description and revision info as well:
I.e. those not being equivalents of SS
On 28/02/18 12:59, Jan Beulich wrote:
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -356,6 +356,41 @@ static const struct twobyte_table {
> };
>
> /*
> + * The next two tables are indexed by high opcode extension byte (the one
> + * that's en
Roger Pau Monne writes ("[PATCH] osstest: add a pvinpvh test"):
> The new shim tests uses the same approach as the PVH one, but doesn't
> differentiate between AMD and Intel.
>
> This is the (trimmed) diff of the output from mg-show-flight-runvars:
LGTM
Acked-by: Ian Jackson
And pushed to pret
On 03/05/2018 02:40 PM, Anthony PERARD wrote:
On Tue, Jan 23, 2018 at 03:22:40PM +, Ross Lagerwall wrote:
The recently added support for restricting QEMU prevents use of the VGA
console. This series addresses that by adding a couple of new dmops.
A corresponding patch for QEMU is needed to m
On 28/02/18 13:00, Jan Beulich wrote:
> Signed-off-by: Jan Beulich
Acked-by: Andrew Cooper
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On 28/02/18 13:03, Jan Beulich wrote:
> @@ -5178,18 +5202,33 @@ x86_emulate(
> _regs.eflags |= X86_EFLAGS_AC;
> break;
>
> -#ifdef __XEN__
> -case 0xd1: /* xsetbv */
> +case 0xd0: /* xgetbv */
> generate_exception_if(vex.pfx, EXC_UD);
> -
On 28/02/18 13:06, Jan Beulich wrote:
> Signed-off-by: Jan Beulich
Reviewed-by: Andrew Cooper
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Instead of hard coding the architected redistributor stride into the
code, lets use a clear #define to the two values for GICv3 and GICv4 and
clarify the algorithm to determine the needed stride value.
Signed-off-by: Andre Przywara
---
Changelog RFC ... v1:
- no changes
xen/arch/arm/gic-v3.c
domain_max_vcpus(), which is used by generic Xen code, returns the
maximum number of VCPUs for a domain, which on ARM is mostly limited by
the VGIC model emulated (a (v)GICv2 can only handle 8 CPUs).
Our current implementation lives in arch/arm/domain.c, but reaches into
VGIC internal data structur
tl;dr: Coarse changelog below, individual patches have changelogs as
well.
This is an updated version of the new VGIC-v2 implementation.
Compared to the RFC posted a month ago, many things have been changed to
address the review comments. The most important things are:
- The GICv3 redistributor cl
Currently we describe the VGIC specific fields in a structure
*embedded* in struct arch_domain and struct arch_vcpu. These members
there are however related to the current VGIC implementation, and will
be substantially different in the future.
To allow coexistence of two implementations, move the d
Currently vgic.h both contains prototypes used by Xen arch code outside
of the actual VGIC (for instance vgic_vcpu_inject_irq()), and prototypes
for functions used by the VGIC internally.
Group them to later allow an easy split with one #ifdef.
Signed-off-by: Andre Przywara
Reviewed-by: Julien Gr
The GICv2 uses bitmaps spanning several MMIO registers for holding some
interrupt state. Similar to GICv3, add a poke helper functions to set a bit
for a given irq_desc in one of those bitmaps.
At the moment there is only one use in gic-v2.c, but there will be more
coming soon.
Signed-off-by: Andr
When playing around with hardware mapped, level triggered virtual IRQs,
there is the need to explicitly set the active or pending state of an
interrupt at some point.
To prepare the GIC for that, we introduce a set_active_state() and a
set_pending_state() function to let the VGIC manipulate the sta
When creating a GICv3 devicetree node, we currently insert the
redistributor-stride and #redistributor-regions properties, with fixed
values which are actually the architected ones. Since those properties are
optional, and in the case of the stride only needed to cover for broken
platforms, we don'
Adds the sorting function to cover the case where you have more IRQs
to consider than you have LRs. We consider their priorities.
This pulls in Linux' list_sort.c, which is a merge sort implementation
for linked lists. Apart from adding a full featured license header and
adjusting the #include file
Add an MMIO handling framework to the VGIC emulation:
Each register is described by its offset, size (or number of bits per
IRQ, if applicable) and the read/write handler functions. We provide
initialization macros to describe each GIC register later easily.
Separate dispatch functions for read an
The config register handlers are shared between the v2 and v3 emulation,
so their implementation goes into vgic-mmio.c, to be easily referenced
from the v3 emulation as well later.
This is based on Linux commit 79717e4ac09c, written by Andre Przywara.
Signed-off-by: Andre Przywara
---
Changelog
On a GICv3 in non-compat mode the hypervisor interface is always
accessed via system registers. Those register names have a "ICH_" prefix
in the manual, to differentiate them from the MMIO registers. Also those
registers are mostly 64-bit (compared to the 32-bit GICv2 registers) and
use different b
If we change something in a vCPU that affects its runnability or
otherwise needs the vCPU's attention, we might need to tell the scheduler
about it.
We are using this in one place (vIRQ injection) at the moment, but will
need this at more places soon.
So let's factor out this functionality in the n
So far the number of list registers (LRs) a GIC implements is only
needed in the hardware facing side of the VGIC code (gic-vgic.c).
The new VGIC will need this information in more and multiple places, so
export a function that returns the number.
Signed-off-by: Andre Przywara
---
Changelog RFC .
The target register handlers are v2 emulation specific, so their
implementation lives entirely in vgic-mmio-v2.c.
We copy the old VGIC behaviour of assigning an IRQ to the first VCPU
set in the target mask instead of making it possibly pending on
multiple VCPUs.
We update the physical affinity of a
The bit definition for the CPUID mask in the GICv2 LR register was
wrong, fortunately the current implementation does not use that bit.
Fix it up (it's starting at bit 10, not bit 9) and clean up some
nearby definitions on the way.
This will be used by the new VGIC shortly.
Signed-off-by: Andre Pr
Tell Xen whether a particular VCPU has an IRQ that needs handling
in the guest. This is used to decide whether a VCPU is runnable or
if a hypercall should be preempted to let the guest handle the IRQ.
This is based on Linux commit 90eee56c5f90, written by Eric Auger.
Signed-off-by: Andre Przywara
gic_event_needs_delivery() is not named very intuitively, especially
the gic_ prefix is somewhat misleading.
Rename it to vgic_pending_irq(), which makes it clear that this relates
to the virtual GIC and is about interrupts.
Signed-off-by: Andre Przywara
---
Changelog RFC ... v1:
- new patch
xe
The ARM arch code requires an interrupt controller emulation to implement
vgic_clear_pending_irqs(), although it is suspected that it is actually
not necessary. Go with a stub for now to make the linker happy.
Signed-off-by: Andre Przywara
---
Changelog RFC ... v1:
- split off from former patch,
To find an unused virtual IRQ number Xen uses a scheme to track used
virtual IRQs.
Implement this interface in the new VGIC to make the Xen core/arch code
happy.
This is actually somewhat VGIC agnostic, so is mostly a copy of the code
from the old VGIC. But it has to live in the VGIC files, so we c
When a VCPU moves to another CPU, we need to adjust the target affinity
of any hardware mapped vIRQs, to observe our "physical-follows-virtual"
policy.
Implement arch_move_irqs() to adjust the physical affinity of all hardware
mapped vIRQs targetting this VCPU.
Signed-off-by: Andre Przywara
---
C
A GICv3 hardware implementation can be implemented in several parts that
communicate with each other (think multi-socket systems).
To make sure that critical settings have arrived at all endpoints, some
bits are tracked using the RWP bit in the GICD_CTLR register, which
signals whether a register w
So far our LR read/write functions do not handle the EOI bit and the
source CPUID bits in an LR, because the current VGIC implementation does
not use them.
Extend the gic_lr data structure to hold these bits of information as
well, packing it on the way to avoid it to grow.
Then extract and assembl
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