flight 119010 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119010/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-ovmf-amd64 broken
test-amd64-i386-xl-xsm7 xe
>>> On 08.02.18 at 13:18, wrote:
> We switch the NMI frequency to ~2Hz after the calibration, but that is
> after having run the BSP at 100Hz for a long period of time, and the APs
> at this rate for a short while. Irrespective of the exact fix here, it
> is simply not a good idea to be running w
>>> On 09.02.18 at 13:35, wrote:
> On 30/01/18 16:40, Jan Beulich wrote:
> On 22.01.18 at 13:32, wrote:
>>> @@ -37,10 +52,24 @@ struct vcpu;
>>>
>>> struct cpu_info {
>>> struct cpu_user_regs guest_cpu_user_regs;
>>> -unsigned int processor_id;
>>> -struct vcpu *current_vcpu;
>>> On 08.02.18 at 14:46, wrote:
> Sorry for late reply but I was busy with other stuff.
>
> On Fri, Jan 19, 2018 at 08:27:46AM -0700, Jan Beulich wrote:
>> >>> On 10.01.18 at 14:05, wrote:
>> > Current limit, PFN_DOWN(xen_phys_start), introduced by commit b280442
>> > (x86: make Xen early boot
> -Original Message-
> From: Tian, Kevin [mailto:kevin.t...@intel.com]
> Sent: 13 February 2018 06:21
> To: Paul Durrant ; xen-devel@lists.xenproject.org
> Cc: Andrew Cooper ; Daniel De Graaf
> ; George Dunlap ;
> Ian Jackson ; Jan Beulich ;
> Julien Grall ; Nakajima, Jun
> ; Konrad Rzeszut
> -Original Message-
> From: Tian, Kevin [mailto:kevin.t...@intel.com]
> Sent: 13 February 2018 06:43
> To: Paul Durrant ; xen-devel@lists.xenproject.org
> Cc: Stefano Stabellini ; Wei Liu
> ; George Dunlap ;
> Andrew Cooper ; Ian Jackson
> ; Tim (Xen.org) ; Jan Beulich
> ; Daniel De Graaf
branch xen-unstable
xenbranch xen-unstable
job test-amd64-i386-xl-qemuu-ovmf-amd64
testid xen-boot
Tree: linux git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Tree: linuxfirmware git://xenbits.xen.org/osstest/linux-firmware.git
Tree: qemu git://xenbits.xen.org/qemu-xen-traditi
> -Original Message-
> From: Tian, Kevin [mailto:kevin.t...@intel.com]
> Sent: 13 February 2018 06:52
> To: Paul Durrant ; xen-devel@lists.xenproject.org
> Cc: Stefano Stabellini ; Wei Liu
> ; George Dunlap ;
> Andrew Cooper ; Ian Jackson
> ; Tim (Xen.org) ; Jan Beulich
>
> Subject: RE: [X
>>> On 08.02.18 at 13:25, wrote:
> Signed-off-by: Roger Pau Monné
A change like this should not come without description, providing a
reason for the change. Otherwise how will someone wanting to
understand the change in a couple of years actually be able to
make any sense of it. This is in parti
>>> On 08.02.18 at 18:01, wrote:
> --- a/xen/arch/x86/hvm/svm/svm.c
> +++ b/xen/arch/x86/hvm/svm/svm.c
> @@ -611,6 +611,12 @@ static void svm_update_guest_efer(struct vcpu *v)
> if ( lma )
> new_efer |= EFER_LME;
> vmcb_set_efer(vmcb, new_efer);
> +
> +if ( !nestedhvm_enable
On Mon, Feb 12, 2018 at 11:23:05AM +, Andrew Cooper wrote:
> .macro ALTERNATIVE oldinstr, newinstr, feature
> .L\@_orig_s:
> \oldinstr
> .L\@_orig_e:
> + .skip (-((repl_len(1) - orig_len) > 0) * (repl_len(1) - orig_len)), 0x90
clang chokes on this expression, because of the negatio
>>> On 09.02.18 at 11:47, wrote:
> On Fri, Feb 09, 2018 at 10:45:25AM +, Julien Grall wrote:
>> Hi,
>>
>> On 02/09/2018 10:29 AM, Roger Pau Monné wrote:
>> > On Thu, Feb 08, 2018 at 08:10:49PM -0700, Sameer Goel wrote:
>> > > diff --git a/xen/include/xen/lib.h b/xen/include/xen/lib.h
>> > > i
>>> On 09.02.18 at 04:10, wrote:
> Port WARN_ON_ONCE macro from Linux.
>
> Signed-off-by: Sameer Goel
> Acked-by: Julien Grall
> ---
> xen/arch/arm/xen.lds.S | 1 +
> xen/arch/x86/xen.lds.S | 1 +
> xen/include/xen/lib.h | 13 +
> 3 files changed, 15 insertions(+)
>
> diff --gi
> -Original Message-
> From: Tian, Kevin [mailto:kevin.t...@intel.com]
> Sent: 13 February 2018 06:56
> To: Paul Durrant ; xen-devel@lists.xenproject.org
> Cc: Stefano Stabellini ; Wei Liu
> ; George Dunlap ;
> Andrew Cooper ; Ian Jackson
> ; Tim (Xen.org) ; Jan Beulich
>
> Subject: RE: [X
>>> On 12.02.18 at 13:30, wrote:
> On Mon, Feb 12, 2018 at 11:23:04AM +, Andrew Cooper wrote:
>> diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
>> index 58f652d..bd3819a 100644
>> --- a/xen/arch/x86/x86_64/entry.S
>> +++ b/xen/arch/x86/x86_64/entry.S
>> @@ -557,23 +557,
On Tue, Feb 13, 2018 at 02:29:08AM -0700, Jan Beulich wrote:
> >>> On 08.02.18 at 13:25, wrote:
> > Signed-off-by: Roger Pau Monné
>
> A change like this should not come without description, providing a
> reason for the change. Otherwise how will someone wanting to
> understand the change in a c
>>> On 12.02.18 at 11:05, wrote:
> If you map the NVDIMM as MMIO to Dom0 you don't need the M2P entries
> IIRC, and if it's mapped using 1GB pages it shouldn't use that much
> memory for the page tables (ie: you could just use normal RAM for the
> page tables that map the NVDIMM IMO). Of course th
On 13/02/2018 09:56, Jan Beulich wrote:
On 12.02.18 at 13:30, wrote:
>> On Mon, Feb 12, 2018 at 11:23:04AM +, Andrew Cooper wrote:
>>> diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
>>> index 58f652d..bd3819a 100644
>>> --- a/xen/arch/x86/x86_64/entry.S
>>> +++ b/x
On 13/02/2018 09:45, Roger Pau Monné wrote:
> On Mon, Feb 12, 2018 at 11:23:05AM +, Andrew Cooper wrote:
>> .macro ALTERNATIVE oldinstr, newinstr, feature
>> .L\@_orig_s:
>> \oldinstr
>> .L\@_orig_e:
>> + .skip (-((repl_len(1) - orig_len) > 0) * (repl_len(1) - orig_len)),
>> 0x90
>
>>> On 09.02.18 at 15:01, wrote:
> Revert "x86: allow Meltdown band-aid to be disabled" in order to
> prepare for a final Meltdown mitigation.
This no also reverts a22320e32dca0918ed23799583f470afe4c24330
afaict. I think that it would be better to revert the whole thing in a
single patch anyway (
On Tue, Feb 13, 2018 at 10:09:15AM +, Andrew Cooper wrote:
> On 13/02/2018 09:45, Roger Pau Monné wrote:
> > On Mon, Feb 12, 2018 at 11:23:05AM +, Andrew Cooper wrote:
> >> .macro ALTERNATIVE oldinstr, newinstr, feature
> >> .L\@_orig_s:
> >> \oldinstr
> >> .L\@_orig_e:
> >> + .
On Tue, Feb 13, 2018 at 03:06:24AM -0700, Jan Beulich wrote:
> >>> On 12.02.18 at 11:05, wrote:
> > If you map the NVDIMM as MMIO to Dom0 you don't need the M2P entries
> > IIRC, and if it's mapped using 1GB pages it shouldn't use that much
> > memory for the page tables (ie: you could just use no
>>> On 12.02.18 at 02:44, wrote:
> --- a/xen/arch/x86/srat.c
> +++ b/xen/arch/x86/srat.c
> @@ -110,8 +110,8 @@ int valid_numa_range(u64 start, u64 end, nodeid_t node)
> for (i = 0; i < num_node_memblks; i++) {
> struct node *nd = &node_memblk_range[i];
>
> - if (n
>>> On 13.02.18 at 10:59, wrote:
> On Tue, Feb 13, 2018 at 02:29:08AM -0700, Jan Beulich wrote:
>> >>> On 08.02.18 at 13:25, wrote:
>> > Signed-off-by: Roger Pau Monné
>>
>> A change like this should not come without description, providing a
>> reason for the change. Otherwise how will someone
>>> On 13.02.18 at 11:29, wrote:
> On Tue, Feb 13, 2018 at 03:06:24AM -0700, Jan Beulich wrote:
>> >>> On 12.02.18 at 11:05, wrote:
>> > If you map the NVDIMM as MMIO to Dom0 you don't need the M2P entries
>> > IIRC, and if it's mapped using 1GB pages it shouldn't use that much
>> > memory for th
On Mon, Feb 12, 2018 at 11:23:07AM +, Andrew Cooper wrote:
> Newer versions of binutils are capable of emitting an exact number bytes worth
> of optimised nops. Use this in preference to .skip when available.
>
> Signed-off-by: Andrew Cooper
> ---
> CC: Jan Beulich
> CC: Konrad Rzeszutek Wi
>>> On 13.02.18 at 11:07, wrote:
> On 13/02/2018 09:56, Jan Beulich wrote:
> On 12.02.18 at 13:30, wrote:
>>> On Mon, Feb 12, 2018 at 11:23:04AM +, Andrew Cooper wrote:
diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
index 58f652d..bd3819a 100644
---
On Tue, Feb 13, 2018 at 04:05:45AM -0700, Jan Beulich wrote:
> >>> On 13.02.18 at 11:29, wrote:
> > On Tue, Feb 13, 2018 at 03:06:24AM -0700, Jan Beulich wrote:
> >> >>> On 12.02.18 at 11:05, wrote:
> >> > If you map the NVDIMM as MMIO to Dom0 you don't need the M2P entries
> >> > IIRC, and if it
Hi,
On 12/02/18 17:42, Julien Grall wrote:
> Hi Andre,
>
> On 09/02/18 14:39, Andre Przywara wrote:
>> The new VGIC implementation centers around a struct vgic_irq instance
>> per virtual IRQ.
>> Provide a function to retrieve the right instance for a given IRQ
>> number and (in case of private i
On Tue, Feb 13, 2018 at 04:04:17AM -0700, Jan Beulich wrote:
> >>> On 13.02.18 at 10:59, wrote:
> > On Tue, Feb 13, 2018 at 02:29:08AM -0700, Jan Beulich wrote:
> >> >>> On 08.02.18 at 13:25, wrote:
> >> > Signed-off-by: Roger Pau Monné
> >>
> >> A change like this should not come without descr
flight 119023 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119023/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf-pvopsbroken
build-i386-libvirt6 libvirt-b
On Thu, Feb 08, 2018 at 01:51:28PM +, Joao Martins wrote:
> > We can probably specify a xenstore node in the spec to
> > return some error code and let libxl read it. With that model old tools
> > work the same (extra node ignored) but new tools can utilise the new
> > node. IIRC there could al
On Mon, Feb 12, 2018 at 11:59:23AM +0100, Juergen Gross wrote:
> On 09/11/17 13:45, Wei Liu wrote:
> > On Thu, Nov 09, 2017 at 01:35:49PM +0100, Juergen Gross wrote:
> >> On 09/11/17 13:31, Wei Liu wrote:
> >>> On Thu, Nov 09, 2017 at 01:10:12PM +0100, Juergen Gross wrote:
> Since carving out
On 12/02/18 18:54, Dario Faggioli wrote:
> On Fri, 2018-02-09 at 15:01 +0100, Juergen Gross wrote:
>> This series is available via github:
>>
>> https://github.com/jgross1/xen.git xpti
>>
>> Dario wants to do some performance tests for this series to compare
>> performance with Jan's series with al
Hi,
On 12/02/18 14:24, Andre Przywara wrote:
What would you expect the caller to do on error? Except printing an
error message?
I don't know either. Comparing this to hardware, an IRQ is usually
fire-and-forget (separating the interrupt line from the interrupt state
here), so a device doesn't
On Tue, Nov 21, 2017 at 12:06:06PM +0100, Juergen Gross wrote:
> The "special pages" for PVH guests include the frames for console and
> Xenstore ring buffers. Those have to be marked as "Reserved" in the
> guest's E820 map, as otherwise conflicts might arise later e.g. when
> hotplugging memory in
On 13/02/18 12:55, Wei Liu wrote:
> On Tue, Nov 21, 2017 at 12:06:06PM +0100, Juergen Gross wrote:
>> The "special pages" for PVH guests include the frames for console and
>> Xenstore ring buffers. Those have to be marked as "Reserved" in the
>> guest's E820 map, as otherwise conflicts might arise
Hi Julien,
On 08.02.18 21:22, Julien Grall wrote:
Now that we've standardised on SMCCC v1.1 to perform the branch
prediction invalidation, let's drop the previous band-aid. If vendors
haven't updated their firmware to do SMCCC 1.1, they haven't updated
PSCI either, so we don't loose anything.
T
On 12/02/18 17:53, Andre Przywara wrote:
Hi,
Hi Andre,
On 12/02/18 13:55, Julien Grall wrote:
Hi Andre,
On 09/02/18 14:39, Andre Przywara wrote:
When playing around with hardware mapped, level triggered virtual IRQs,
there is the need to explicitly set the active state of an interrupt at
s
On 12/02/18 18:23, Andre Przywara wrote:
Hi,
Hi Andre,
On 12/02/18 15:19, Julien Grall wrote:
Hi Andre,
On 09/02/18 14:39, Andre Przywara wrote:
The ARM Generic Timer uses a level-sensitive interrupt semantic. We
easily catch when the line goes high, as this triggers the hardware IRQ.
Ho
On Tue, Feb 06, 2018 at 03:08:45PM +0200, Oleksandr Grytsov wrote:
> On Tue, Feb 6, 2018 at 2:36 PM, Wei Liu wrote:
>
> > On Thu, Dec 14, 2017 at 04:14:12PM +0200, Oleksandr Grytsov wrote:
> > > From: Oleksandr Grytsov
> > >
> > > We have following arm-based setup:
> > >
> > > - Dom0 with xen an
On Mon, Feb 12, 2018 at 07:22:27PM +0200, Oleksandr Grytsov wrote:
> On Wed, Feb 7, 2018 at 2:14 PM, Oleksandr Andrushchenko
> wrote:
>
> > On 02/06/2018 02:52 PM, Wei Liu wrote:
> >
> >> On Tue, Feb 06, 2018 at 02:44:56PM +0200, Oleksandr Andrushchenko wrote:
> >>
> >>> From aa1f20af73a5a3c8f2
* Juergen Gross wrote:
> On 08/02/18 01:59, Boris Ostrovsky wrote:
> >
> >
> > On 02/07/2018 06:49 PM, Prarit Bhargava wrote:
> >> The kernel panics on PV domains because native_smp_cpus_done() is
> >> only called for HVM domains.
> >>
> >> Calculate __max_logical_packages for PV domains.
> >>
Hi Andre,
On 09/02/18 14:39, Andre Przywara wrote:
Adds the sorting function to cover the case where you have more IRQs
to consider than you have LRs. We consider their priorities.
This pulls in Linux' list_sort.c , which is a merge sort implementation
for linked lists.
This is based on Linux c
On Tue, Feb 13, 2018 at 12:57:31PM +0100, Juergen Gross wrote:
> On 13/02/18 12:55, Wei Liu wrote:
> > On Tue, Nov 21, 2017 at 12:06:06PM +0100, Juergen Gross wrote:
> >> The "special pages" for PVH guests include the frames for console and
> >> Xenstore ring buffers. Those have to be marked as "Re
Hi Andre,
On 09/02/18 14:39, Andre Przywara wrote:
Implement the framework for syncing IRQs between our emulation and the
list registers, which represent the guest's view of IRQs.
This is done in kvm_vgic_flush_hwstate and kvm_vgic_sync_hwstate, which
You probably want to update the names here
xl vcpu-set with a HVM domU sends an ACPI event to do hot-add of cpus. But if
the vcpu count is decreased the domU does not offline any cpu. So far the only
way to enforce offlining is to process the output of 'xenstore-watch cpu'.
Why is HVM excluded in drivers/xen/cpu_hotplug.c:setup_vcpu_hotp
On Lu, 2018-02-12 at 15:54 +, Andrew Cooper wrote:
> On 12/02/18 15:08, Alexandru Isaila wrote:
> >
> > @@ -2619,14 +2634,31 @@ void svm_vmexit_handler(struct
> > cpu_user_regs *regs)
> > break;
> >
> > case VMEXIT_EXCEPTION_BP:
> > -if ( !v->domain->debugger_attached )
>
flight 119049 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119049/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt 14 saverestore-support-checkfail like 118829
test-armhf-armhf-libvirt-xsm 14 saveresto
On Tue, Feb 13, 2018 at 2:06 PM, Wei Liu wrote:
> On Tue, Feb 06, 2018 at 03:08:45PM +0200, Oleksandr Grytsov wrote:
> > On Tue, Feb 6, 2018 at 2:36 PM, Wei Liu wrote:
> >
> > > On Thu, Dec 14, 2017 at 04:14:12PM +0200, Oleksandr Grytsov wrote:
> > > > From: Oleksandr Grytsov
> > > >
> > > > We
flight 119036 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119036/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-armhf-armhf-xl-rtds16 guest-start/debian.repeat fail REGR. vs. 118942
Tests which did not succee
>>> On 13.02.18 at 12:27, wrote:
> On Tue, Feb 13, 2018 at 04:04:17AM -0700, Jan Beulich wrote:
>> >>> On 13.02.18 at 10:59, wrote:
>> > On Tue, Feb 13, 2018 at 02:29:08AM -0700, Jan Beulich wrote:
>> >> >>> On 08.02.18 at 13:25, wrote:
>> >> > Signed-off-by: Roger Pau Monné
>> >>
>> >> A chan
>>> On 13.02.18 at 12:13, wrote:
> On Tue, Feb 13, 2018 at 04:05:45AM -0700, Jan Beulich wrote:
>> >>> On 13.02.18 at 11:29, wrote:
>> > On Tue, Feb 13, 2018 at 03:06:24AM -0700, Jan Beulich wrote:
>> >> >>> On 12.02.18 at 11:05, wrote:
>> >> > If you map the NVDIMM as MMIO to Dom0 you don't nee
>>> On 13.02.18 at 12:36, wrote:
> On 12/02/18 18:54, Dario Faggioli wrote:
>> On Fri, 2018-02-09 at 15:01 +0100, Juergen Gross wrote:
>>> This series is available via github:
>>>
>>> https://github.com/jgross1/xen.git xpti
>>>
>>> Dario wants to do some performance tests for this series to compar
>>> On 12.02.18 at 12:23, wrote:
> --- a/xen/include/asm-x86/alternative.h
> +++ b/xen/include/asm-x86/alternative.h
> @@ -65,11 +65,6 @@ extern void alternative_instructions(void);
> ALTERNATIVE(oldinstr, newinstr1, feature1)\
> ALTERNATIVE_N(newinstr2, feature
>>> On 12.02.18 at 12:23, wrote:
> * Rename some fields for consistency and clarity, and use standard types.
> * Don't opencode the use of ALT_{ORIG,REPL}_PTR().
>
> No functional change.
>
> Signed-off-by: Andrew Cooper
Reviewed-by: Jan Beulich
__
On 13/02/18 15:16, Jan Beulich wrote:
On 13.02.18 at 12:36, wrote:
>> On 12/02/18 18:54, Dario Faggioli wrote:
>>> On Fri, 2018-02-09 at 15:01 +0100, Juergen Gross wrote:
This series is available via github:
https://github.com/jgross1/xen.git xpti
Dario wants to do so
Hi Andre,
On 09/02/18 14:39, Andre Przywara wrote:
+/* Requires the VCPU's ap_list_lock to be held. */
+static void vgic_flush_lr_state(struct vcpu *vcpu)
+{
+struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
+struct vgic_irq *irq;
+int count = 0;
+
+ASSERT(spin_is_locked(&vgic_c
Hi,
On 09/02/18 14:39, Andre Przywara wrote:
Processing maintenance interrupts and accessing the list registers
are dependent on the host's GIC version.
Introduce vgic-v2.c to contain GICv2 specific functions.
Implement the GICv2 specific code for syncing the emulation state
into the VGIC regist
>>> On 12.02.18 at 12:23, wrote:
> --- a/xen/include/asm-x86/alternative-asm.h
> +++ b/xen/include/asm-x86/alternative-asm.h
> @@ -9,60 +9,67 @@
> * enough information for the alternatives patching code to patch an
> * instruction. See apply_alternatives().
> */
> -.macro altinstruction_ent
On 13/02/18 14:22, Jan Beulich wrote:
On 12.02.18 at 12:23, wrote:
>> --- a/xen/include/asm-x86/alternative.h
>> +++ b/xen/include/asm-x86/alternative.h
>> @@ -65,11 +65,6 @@ extern void alternative_instructions(void);
>> ALTERNATIVE(oldinstr, newinstr1, feature1)
flight 119060 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119060/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemuu-ws16-amd64 17 guest-stop fail REGR. vs. 115539
Tests which did not suc
Hi,
Christoffer, Eric, Marc,
a question about locking order between multiple IRQs below. Could you
have a brief look, please?
On 13/02/18 12:30, Julien Grall wrote:
> Hi Andre,
>
> On 09/02/18 14:39, Andre Przywara wrote:
>> Adds the sorting function to cover the case where you have more IRQs
>>
Hi,
On 13/02/18 14:31, Julien Grall wrote:
> Hi Andre,
>
> On 09/02/18 14:39, Andre Przywara wrote:
>> +/* Requires the VCPU's ap_list_lock to be held. */
>> +static void vgic_flush_lr_state(struct vcpu *vcpu)
>> +{
>> + struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
>> + struct vgic_irq
On 13/02/18 14:56, Andre Przywara wrote:
diff --git a/xen/common/list_sort.c b/xen/common/list_sort.c
new file mode 100644
index 00..9c5cc58e43
--- /dev/null
+++ b/xen/common/list_sort.c
@@ -0,0 +1,170 @@
+/*
+ * list_sort.c: merge sort implementation for linked lists
+ * Copied from th
Hi,
On 13/02/18 12:02, Julien Grall wrote:
> On 12/02/18 17:53, Andre Przywara wrote:
>> Hi,
>
> Hi Andre,
>
>> On 12/02/18 13:55, Julien Grall wrote:
>>> Hi Andre,
>>>
>>> On 09/02/18 14:39, Andre Przywara wrote:
When playing around with hardware mapped, level triggered virtual IRQs,
On 13/02/18 14:56, Andre Przywara wrote:
Hi,
On 13/02/18 14:31, Julien Grall wrote:
Hi Andre,
On 09/02/18 14:39, Andre Przywara wrote:
+/* Requires the VCPU's ap_list_lock to be held. */
+static void vgic_flush_lr_state(struct vcpu *vcpu)
+{
+ struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic
Hi Jan,
I've updated the comments according to your previous suggestions,
do they look good to you?
2018-02-01 18:23 GMT+08:00 Jan Beulich :
On 30.01.18 at 18:50, wrote:
>> --- a/xen/arch/x86/mm.c
>> +++ b/xen/arch/x86/mm.c
>> @@ -4126,6 +4126,10 @@ int xenmem_add_to_physmap_one(
>>
On Tue, Feb 13, 2018 at 06:41:14AM -0700, Jan Beulich wrote:
> >>> On 13.02.18 at 12:27, wrote:
> > On Tue, Feb 13, 2018 at 04:04:17AM -0700, Jan Beulich wrote:
> >> >>> On 13.02.18 at 10:59, wrote:
> >> > On Tue, Feb 13, 2018 at 02:29:08AM -0700, Jan Beulich wrote:
> >> >> >>> On 08.02.18 at 13:
>>> On 13.02.18 at 16:11, wrote:
> On Tue, Feb 13, 2018 at 06:41:14AM -0700, Jan Beulich wrote:
>> >>> On 13.02.18 at 12:27, wrote:
>> > On Tue, Feb 13, 2018 at 04:04:17AM -0700, Jan Beulich wrote:
>> >> >>> On 13.02.18 at 10:59, wrote:
>> >> > On Tue, Feb 13, 2018 at 02:29:08AM -0700, Jan Beuli
>>> On 13.02.18 at 16:15, wrote:
> I've updated the comments according to your previous suggestions,
> do they look good to you?
The one in the public header is way too verbose. I specifically don't
see why you would need to spell out XSM privilege requirements
there. Please make new comments mat
flight 119079 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119079/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
>>> On 13.02.18 at 15:41, wrote:
> On 13/02/18 14:22, Jan Beulich wrote:
> On 12.02.18 at 12:23, wrote:
>>> @@ -118,26 +113,6 @@ extern void alternative_instructions(void);
>>>newinstr2, feature2) \
>>> : output : input)
>>>
>
Hi,
On 13/02/18 12:41, Julien Grall wrote:
> Hi Andre,
>
> On 09/02/18 14:39, Andre Przywara wrote:
>> Implement the framework for syncing IRQs between our emulation and the
>> list registers, which represent the guest's view of IRQs.
>> This is done in kvm_vgic_flush_hwstate and kvm_vgic_sync_hw
On Tue, Feb 13, 2018 at 06:40:20AM -0700, Jan Beulich wrote:
> >>> On 13.02.18 at 12:13, wrote:
> > On Tue, Feb 13, 2018 at 04:05:45AM -0700, Jan Beulich wrote:
> >> >>> On 13.02.18 at 11:29, wrote:
> >> > On Tue, Feb 13, 2018 at 03:06:24AM -0700, Jan Beulich wrote:
> >> >> >>> On 12.02.18 at 11:
On Tue, Feb 13, 2018 at 08:22:33AM -0700, Jan Beulich wrote:
> >>> On 13.02.18 at 16:11, wrote:
> > On Tue, Feb 13, 2018 at 06:41:14AM -0700, Jan Beulich wrote:
> >> >>> On 13.02.18 at 12:27, wrote:
> >> > On Tue, Feb 13, 2018 at 04:04:17AM -0700, Jan Beulich wrote:
> >> >> >>> On 13.02.18 at 10:
On Wed, Jan 24, 2018 at 10:01:18AM +, Roger Pau Monne wrote:
> Hello,
>
> The following patch series enables LLVM coverage support for the Xen
> hypervisor. A sample coverage report obtained after booting a PVHv2 Dom0
> can be found at:
>
> http://xenbits.xen.org/people/royger/xen_profile/
>
>>> On 13.02.18 at 16:53, wrote:
> On Wed, Jan 24, 2018 at 10:01:18AM +, Roger Pau Monne wrote:
>> Hello,
>>
>> The following patch series enables LLVM coverage support for the Xen
>> hypervisor. A sample coverage report obtained after booting a PVHv2 Dom0
>> can be found at:
>>
>> http://xe
On Tue, Feb 13, 2018 at 3:56 PM, Andre Przywara
wrote:
> Hi,
>
> Christoffer, Eric, Marc,
> a question about locking order between multiple IRQs below. Could you
> have a brief look, please?
>
> On 13/02/18 12:30, Julien Grall wrote:
>> Hi Andre,
>>
>> On 09/02/18 14:39, Andre Przywara wrote:
>>>
Hi,
On 09/02/18 14:39, Andre Przywara wrote:
Tell Xen whether a particular VCPU has an IRQ that needs handling
in the guest. This is used to decide whether a VCPU is runnable.
This is based on Linux commit 90eee56c5f90, written by Eric Auger.
Signed-off-by: Andre Przywara
---
xen/arch/arm/v
On 13/02/18 16:35, Julien Grall wrote:
Hi,
On 09/02/18 14:39, Andre Przywara wrote:
Tell Xen whether a particular VCPU has an IRQ that needs handling
in the guest. This is used to decide whether a VCPU is runnable.
I forgot to mention one thing. This is not the main usage of this
function
On 13/02/18 15:48, Roger Pau Monné wrote:
> On Tue, Feb 13, 2018 at 08:22:33AM -0700, Jan Beulich wrote:
> On 13.02.18 at 16:11, wrote:
>>> On Tue, Feb 13, 2018 at 06:41:14AM -0700, Jan Beulich wrote:
>>> On 13.02.18 at 12:27, wrote:
> On Tue, Feb 13, 2018 at 04:04:17AM -0700, Jan Beu
On Tue, Feb 13, 2018 at 09:16:19AM -0700, Jan Beulich wrote:
> >>> On 13.02.18 at 16:53, wrote:
> > On Wed, Jan 24, 2018 at 10:01:18AM +, Roger Pau Monne wrote:
> >> Hello,
> >>
> >> The following patch series enables LLVM coverage support for the Xen
> >> hypervisor. A sample coverage report
Hi Andre,7
On 09/02/18 14:39, Andre Przywara wrote:
Add an MMIO handling framework to the VGIC emulation:
Each register is described by its offset, size (or number of bits per
IRQ, if applicable) and the read/write handler functions. We provide
initialization macros to describe each GIC register
>>> On 13.02.18 at 17:28, wrote:
> On Tue, Feb 13, 2018 at 09:16:19AM -0700, Jan Beulich wrote:
>> >>> On 13.02.18 at 16:53, wrote:
>> > On Wed, Jan 24, 2018 at 10:01:18AM +, Roger Pau Monne wrote:
>> >> Hello,
>> >>
>> >> The following patch series enables LLVM coverage support for the Xen
Along the lines of commit 7226486767 ("x86/srat: fix the end pfn check
in valid_numa_range()") nodes_cover_memory() also doesn't consistently
use "end": It's set to an inclusive value initially, but then compared
to the exclusive "end" field of struct node and also possibly set to
nodes[j].start, m
On 13/02/18 17:11, Jan Beulich wrote:
> Along the lines of commit 7226486767 ("x86/srat: fix the end pfn check
> in valid_numa_range()") nodes_cover_memory() also doesn't consistently
> use "end": It's set to an inclusive value initially, but then compared
> to the exclusive "end" field of struct n
Hi,
On 13/02/18 16:52, Julien Grall wrote:
> Hi Andre,7
>
> On 09/02/18 14:39, Andre Przywara wrote:
>> Add an MMIO handling framework to the VGIC emulation:
>> Each register is described by its offset, size (or number of bits per
>> IRQ, if applicable) and the read/write handler functions. We pr
Pardon any weird formatting, I'm replying on my phone.
Because they are two different things. One is an assert to make sure nothing
wrong is happening with the EFER.SVME bit, and the other changes what features
are enabled.
IIRC, most asserts are on their on ifs and not in a if statement wi
On Feb 7, 2018, at 11:05, Jan Beulich wrote:
>
> 1: slightly reduce Meltdown band-aid overhead
> 2: remove CR reads from exit-to-guest path
> 3: introduce altinstruction_nop assembler macro
> 4: NOP out most XPTI entry/exit code when it's not in use
> 5: avoid double CR3 reload when switching to
flight 119098 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/119098/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
On 02/09/2018 07:12 PM, Julien Grall wrote:
Hi,
On 02/09/2018 07:10 PM, Stefano Stabellini wrote:
On Fri, 9 Feb 2018, Julien Grall wrote:
On 02/09/2018 07:02 PM, Stefano Stabellini wrote:
On Fri, 9 Feb 2018, Julien Grall wrote:
Hi,
On 02/08/2018 11:49 PM, Stefano Stabellini wrote:
On Thu
The current XPTI implementation isolates the directmap (and therefore a lot of
guest data), but a large quantity of CPU0's state (including its stack)
remains visible.
Furthermore, an attacker able to read .text is in a vastly superior position
to normal when it comes to fingerprinting Xen for kno
Signed-off-by: Wei Liu
---
xen/arch/x86/mm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 0b5fd199a4..97d2ea17fb 100644
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -128,8 +128,6 @@
#include
#include
-#include "pv/mm.h"
-
/* Overrid
Hello
This series can be found at:
https://xenbits.xen.org/git-http/people/liuw/xen.git wip.split-mm-v6.1
Unfortunately there isn't any resemblance to v5 because a lot of things
have changed since Sept last year. And the opinions gathered at the time
would make this version more or less a comp
And replace open-coded _put_page_type where the parent table parameter
is not null.
This is in preparation for code movement in which various
put_page_from_lNe will be moved to pv/mm.c.
Signed-off-by: Wei Liu
---
xen/arch/x86/mm.c| 28 ++--
xen/include/asm-x86/mm
Linear page table is a PV only feature. The functions used to handle
that will be moved.
Create a function for decreasing linear page table count. It is called
unconditionally from common code so the stub is empty.
No functional change.
Signed-off-by: Wei Liu
---
xen/arch/x86/mm.c |
The function will skip stamping the page when the page is used as page
table in shadow mode. Since it is called both in PV code and common
code we need to export it.
Signed-off-by: Wei Liu
---
I tried to move it to a header to keep in static inline but couldn't
find a place that works.
This func
This will make moving pv mm code easier. To retain same behaviour the
base mask is copied to shadow code.
No functional change.
Signed-off-by: Wei Liu
---
xen/arch/x86/mm.c | 13 +++--
xen/arch/x86/mm/shadow/multi.c | 15 ---
xen/arch/x86/pv/ro-page-fault.c |
The two functions are only used by PV code paths because:
1. To allocate a PGT_l*_page_table type page, a DomU must explicitly
request such types via PV MMU hypercall.
2. PV Dom0 builder explicitly asks for PGT_l*_page_table type pages,
but it is obviously PV only.
3. p2m_alloc_ptp explicitl
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