> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: Thursday, June 28, 2018 9:11 PM
>
> >>> On 26.06.18 at 15:18, wrote:
> > --- a/xen/include/asm-x86/msr-index.h
> > +++ b/xen/include/asm-x86/msr-index.h
> > @@ -15,6 +15,13 @@
> > * abbreviated name.
> > */
> >
> > +#define MSR_FEATURE_CO
>>> On 26.06.18 at 15:18, wrote:
> --- a/xen/include/asm-x86/msr-index.h
> +++ b/xen/include/asm-x86/msr-index.h
> @@ -15,6 +15,13 @@
> * abbreviated name.
> */
>
> +#define MSR_FEATURE_CONTROL 0x003a
> +#define FEAT_CTL_LOCK (_AC(1, ULL) << 0)
> +#define F
On Tue, Jun 26, 2018 at 02:18:16PM +0100, Andrew Cooper wrote:
> The existing bit names are excessively long (45 chars!), and can be trimmed
> down substantially. Drop the IA32 prefix and abbreviate FEATURE_CONTROL to
> FEAT_CTL. Furthermore, all of these are feature enablement bits, so drop
> EN
On Tue, Jun 26, 2018 at 02:18:16PM +0100, Andrew Cooper wrote:
> The existing bit names are excessively long (45 chars!), and can be trimmed
> down substantially. Drop the IA32 prefix and abbreviate FEATURE_CONTROL to
> FEAT_CTL. Furthermore, all of these are feature enablement bits, so drop
> EN
>>> On 26.06.18 at 19:59, wrote:
> On 26/06/18 14:18, Andrew Cooper wrote:
>> xen/arch/x86/cpu/mwait-idle.c | 4 ++--
>
> I forgot to say that this patch as shown may impact the ease of taking
> new code from Linux.
The diffstat above doesn't suggest this is going to make things more
comp
On 26/06/18 14:18, Andrew Cooper wrote:
> xen/arch/x86/cpu/mwait-idle.c | 4 ++--
I forgot to say that this patch as shown may impact the ease of taking
new code from Linux.
While we don't want to proliferate the broken APIs of the current
rdmsr() infrastructure, one option we could do is
