On 2025/1/21 18:29, Jan Beulich wrote:
> On 21.01.2025 10:29, Roger Pau Monné wrote:
>> On Tue, Jan 21, 2025 at 09:10:26AM +, Chen, Jiqian wrote:
>>> On 2025/1/21 16:46, Roger Pau Monné wrote:
On Tue, Jan 14, 2025 at 11:26:36AM +0800, Jiqian Chen wrote:
> +ctrl = pci_conf_read32(pd
On 21.01.2025 10:29, Roger Pau Monné wrote:
> On Tue, Jan 21, 2025 at 09:10:26AM +, Chen, Jiqian wrote:
>> On 2025/1/21 16:46, Roger Pau Monné wrote:
>>> On Tue, Jan 14, 2025 at 11:26:36AM +0800, Jiqian Chen wrote:
+ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(0));
On Tue, Jan 21, 2025 at 09:10:26AM +, Chen, Jiqian wrote:
> On 2025/1/21 16:46, Roger Pau Monné wrote:
> > On Tue, Jan 14, 2025 at 11:26:36AM +0800, Jiqian Chen wrote:
> >> +ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(0));
> >> +nbars = MASK_EXTR(ctrl, PCI_REBAR_CTR
On 2025/1/21 16:46, Roger Pau Monné wrote:
> On Tue, Jan 14, 2025 at 11:26:36AM +0800, Jiqian Chen wrote:
>> +ctrl = pci_conf_read32(pdev->sbdf, rebar_offset + PCI_REBAR_CTRL(0));
>> +nbars = MASK_EXTR(ctrl, PCI_REBAR_CTRL_NBAR_MASK);
>> +for ( unsigned int i = 0; i < nbars; i++ )
>> +
On Tue, Jan 14, 2025 at 11:26:36AM +0800, Jiqian Chen wrote:
> Some devices, like discrete GPU of amd, support resizable bar
> capability, but vpci of Xen doesn't support this feature, so
> they fail to resize bars and then cause probing failure.
>
> According to PCIe spec, each bar that supports
On 2025/1/20 23:35, Jan Beulich wrote:
> On 14.01.2025 04:26, Jiqian Chen wrote:
>> --- /dev/null
>> +++ b/xen/drivers/vpci/rebar.c
>> @@ -0,0 +1,135 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> +/*
>> + * Copyright (C) 2024 Advanced Micro Devices, Inc. All Rights Reserved.
>
> Nit: This
On 14.01.2025 04:26, Jiqian Chen wrote:
> --- /dev/null
> +++ b/xen/drivers/vpci/rebar.c
> @@ -0,0 +1,135 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * Copyright (C) 2024 Advanced Micro Devices, Inc. All Rights Reserved.
Nit: This has now gone stale.
> + * Author: Jiqian Chen
> +