On 10.07.2024 16:44, Milan Đokić wrote:
> On Mon, Jul 8, 2024 at 11:32 AM Jan Beulich wrote:
>> On 04.07.2024 19:21, Milan Đokić wrote:
>>> On Wed, Jul 3, 2024 at 5:55 PM Jan Beulich wrote:
On 03.07.2024 02:04, Milan Djokic wrote:
> +#ifdef CONFIG_RISCV_EFI
> +/*
> +
On Mon, Jul 8, 2024 at 11:32 AM Jan Beulich wrote:
>
> On 04.07.2024 19:21, Milan Đokić wrote:
> > On Wed, Jul 3, 2024 at 5:55 PM Jan Beulich wrote:
> >> On 03.07.2024 02:04, Milan Djokic wrote:
> >>> +#ifdef CONFIG_RISCV_EFI
> >>> +/*
> >>> + * This instruction decodes to "MZ" AS
On 04.07.2024 19:21, Milan Đokić wrote:
> On Wed, Jul 3, 2024 at 5:55 PM Jan Beulich wrote:
>> On 03.07.2024 02:04, Milan Djokic wrote:
>>> +#ifdef CONFIG_RISCV_EFI
>>> +/*
>>> + * This instruction decodes to "MZ" ASCII required by UEFI.
>>> + */
>>> +c.li s4,-13
>>
On Wed, Jul 3, 2024 at 5:55 PM Jan Beulich wrote:
>
> On 03.07.2024 02:04, Milan Djokic wrote:
> > Added riscv image header to enable boot from second stage bootloaders (e.g.
> > uboot. Image header defined in riscv-image-header.h)
> > Additionally, RISC-V xen image is extended with PE/COFF heade
On Wed, 2024-07-03 at 17:55 +0200, Jan Beulich wrote:
> So, first: Please Cc all applicable maintainers. It would probably be
> prudent
> to also Cc Oleksii, who's doing most of the RISC-V work now (but
> Oleksii,
> please correct me if you don't want to be Cc-ed).
Thanks for adding me and I will b
On 03.07.2024 02:04, Milan Djokic wrote:
> Added riscv image header to enable boot from second stage bootloaders (e.g.
> uboot. Image header defined in riscv-image-header.h)
> Additionally, RISC-V xen image is extended with PE/COFF headers, introducing
> EFI application format.
> PE/COFF header i
