On Thu, 10 Dec 2020, Luca Fancellu wrote:
> On the Cortex A53, when executing in AArch64 state, a load or store
> instruction
> which uses the result of an ADRP instruction as a base register, or which uses
> a base register written by an instruction immediately after an ADRP to the
> same registe
Hi Luca,
> On 10 Dec 2020, at 10:42, Luca Fancellu wrote:
>
> On the Cortex A53, when executing in AArch64 state, a load or store
> instruction
> which uses the result of an ADRP instruction as a base register, or which uses
> a base register written by an instruction immediately after an ADRP
