On 17.04.2020 15:36, Brendan Kerrigan wrote:
> The Intel graphics device records DMAR faults regardless
> of the Fault Process Disable bit being set.
I can't seem to be able to find a place where we would set FPD.
Why do we need the workaround then, or what am I missing?
> When this fault
> occur
While it's described as errata for gen8/9, the previous reporting was from
2015 which predates those generations. I tested it on a gen 7 box (which
was causing me the grief of consuming my Xen console buffer). It could be
the case that the FPD code isn't implemented (which wouldn't matter for
gen8/
> From: Brendan Kerrigan
> Sent: Friday, April 17, 2020 9:36 PM
>
> From: Brendan Kerrigan
>
> The Intel graphics device records DMAR faults regardless
> of the Fault Process Disable bit being set. When this fault
Since this is an errata for specific generations, let's describe
this way instea
