On Wed, Nov 03, 2021 at 10:16:26AM +, Jane Malalane wrote:
> On 02/11/2021 08:51, Roger Pau Monné wrote:
> > On Mon, Nov 01, 2021 at 10:47:26AM +, Andrew Cooper wrote:
> > > Hello,
> > >
> > > On ARM, the GIC is a hard prerequisite for VMs.
> > >
> > > I can't remember what the state of R
On 02/11/2021 08:51, Roger Pau Monné wrote:
On Mon, Nov 01, 2021 at 10:47:26AM +, Andrew Cooper wrote:
Hello,
On ARM, the GIC is a hard prerequisite for VMs.
I can't remember what the state of RISCV is, but IIRC there is still
some debate over how interrupts are expected to work under virt
On 01.11.2021 11:47, Andrew Cooper wrote:
> Hello,
>
> On ARM, the GIC is a hard prerequisite for VMs.
>
> I can't remember what the state of RISCV is, but IIRC there is still
> some debate over how interrupts are expected to work under virt.
>
> On x86, the story is very different. PV have no
On Mon, Nov 01, 2021 at 10:47:26AM +, Andrew Cooper wrote:
> Hello,
>
> On ARM, the GIC is a hard prerequisite for VMs.
>
> I can't remember what the state of RISCV is, but IIRC there is still
> some debate over how interrupts are expected to work under virt.
>
> On x86, the story is very di
Hi,
> On 2 Nov 2021, at 07:16, Alistair Francis wrote:
>
> On Tue, Nov 2, 2021 at 6:33 AM Stefano Stabellini
> wrote:
>>
>> +Bertrand
>>
>> On Mon, 1 Nov 2021, Andrew Cooper wrote:
>>> Hello,
>>>
>>> On ARM, the GIC is a hard prerequisite for VMs.
>>>
>>> I can't remember what the state of
On Tue, Nov 2, 2021 at 6:33 AM Stefano Stabellini
wrote:
>
> +Bertrand
>
> On Mon, 1 Nov 2021, Andrew Cooper wrote:
> > Hello,
> >
> > On ARM, the GIC is a hard prerequisite for VMs.
> >
> > I can't remember what the state of RISCV is, but IIRC there is still
> > some debate over how interrupts ar
On Mon, Nov 01, 2021 at 10:47:26AM +, Andrew Cooper wrote:
> Hello,
>
> On ARM, the GIC is a hard prerequisite for VMs.
>
> I can't remember what the state of RISCV is, but IIRC there is still
> some debate over how interrupts are expected to work under virt.
>
Yes sir, that addition to the
+Bertrand
On Mon, 1 Nov 2021, Andrew Cooper wrote:
> Hello,
>
> On ARM, the GIC is a hard prerequisite for VMs.
>
> I can't remember what the state of RISCV is, but IIRC there is still
> some debate over how interrupts are expected to work under virt.
>
> On x86, the story is very different. P
Hello,
On ARM, the GIC is a hard prerequisite for VMs.
I can't remember what the state of RISCV is, but IIRC there is still
some debate over how interrupts are expected to work under virt.
On x86, the story is very different. PV have no hardware assistance,
while HVM hardware assistance depends
