Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-11 Thread Jan Beulich
>>> On 11.10.18 at 18:33, wrote: > >> On Oct 11, 2018, at 5:15 PM, Jan Beulich wrote: >> > On 11.10.18 at 17:54, wrote: >> On Oct 2, 2018, at 1:47 PM, Jan Beulich wrote: >>> On 02.10.18 at 12:51, wrote: > This doesn't behave like real hardware, and definitely d

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-11 Thread George Dunlap
> On Oct 2, 2018, at 11:51 AM, Andrew Cooper wrote: > > On 02/10/18 11:36, Jan Beulich wrote: > On 25.09.18 at 16:14, wrote: >>> Emulation requiring device model assistance uses a form of instruction >>> re-execution, assuming that the second (and any further) pass takes >>> exactly the sa

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-11 Thread George Dunlap
> On Oct 11, 2018, at 5:15 PM, Jan Beulich wrote: > On 11.10.18 at 17:54, wrote: > >>> On Oct 2, 2018, at 1:47 PM, Jan Beulich wrote: >>> >> On 02.10.18 at 12:51, wrote: >>> This doesn't behave like real hardware, and definitely doesn't behave as named - "struct hvmemul

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-11 Thread Jan Beulich
>>> On 11.10.18 at 17:54, wrote: >> On Oct 2, 2018, at 1:47 PM, Jan Beulich wrote: >> > On 02.10.18 at 12:51, wrote: >> >>> This doesn't behave like real hardware, and definitely doesn't behave as >>> named - "struct hvmemul_cache" is simply false. If it were named >>> hvmemul_psc (or so

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-11 Thread George Dunlap
> On Oct 2, 2018, at 1:47 PM, Jan Beulich wrote: > On 02.10.18 at 12:51, wrote: > >> This doesn't behave like real hardware, and definitely doesn't behave as >> named - "struct hvmemul_cache" is simply false. If it were named >> hvmemul_psc (or some other variation on Paging Structure Ca

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-10 Thread Jan Beulich
>>> On 02.10.18 at 12:51, wrote: > On 02/10/18 11:36, Jan Beulich wrote: > On 25.09.18 at 16:14, wrote: >>> Emulation requiring device model assistance uses a form of instruction >>> re-execution, assuming that the second (and any further) pass takes >>> exactly the same path. This is a valid

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-02 Thread Jan Beulich
>>> On 02.10.18 at 12:51, wrote: > On 02/10/18 11:36, Jan Beulich wrote: > On 25.09.18 at 16:14, wrote: >>> Emulation requiring device model assistance uses a form of instruction >>> re-execution, assuming that the second (and any further) pass takes >>> exactly the same path. This is a valid

Re: [Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-02 Thread Andrew Cooper
On 02/10/18 11:36, Jan Beulich wrote: On 25.09.18 at 16:14, wrote: >> Emulation requiring device model assistance uses a form of instruction >> re-execution, assuming that the second (and any further) pass takes >> exactly the same path. This is a valid assumption as far as use of CPU >> regi

[Xen-devel] Ping: [PATCH v3 0/4] x86/HVM: implement memory read caching

2018-10-02 Thread Jan Beulich
>>> On 25.09.18 at 16:14, wrote: > Emulation requiring device model assistance uses a form of instruction > re-execution, assuming that the second (and any further) pass takes > exactly the same path. This is a valid assumption as far as use of CPU > registers goes (as those can't change without a