On 09.10.2019 15:56, Roger Pau Monné wrote:
> On Wed, Oct 09, 2019 at 02:03:12PM +0200, Jan Beulich wrote:
>> On 09.10.2019 13:29, Roger Pau Monné wrote:
>>> Right, then I guess we either mask all the io-apic pins or we setup
>>> proper remapping entries for non-masked pins? (in order to avoid io
On Wed, Oct 09, 2019 at 02:03:12PM +0200, Jan Beulich wrote:
> On 09.10.2019 13:29, Roger Pau Monné wrote:
> > On Wed, Oct 09, 2019 at 12:41:05PM +0200, Jan Beulich wrote:
> >> On 09.10.2019 12:11, Roger Pau Monné wrote:
> >>> And it does print the following when setting up the iommu:
> >>>
> >>>
On 09.10.2019 13:29, Roger Pau Monné wrote:
> On Wed, Oct 09, 2019 at 12:41:05PM +0200, Jan Beulich wrote:
>> On 09.10.2019 12:11, Roger Pau Monné wrote:
>>> And it does print the following when setting up the iommu:
>>>
>>> (XEN) ioapic 0 pin 0 not masked
>>> (XEN) vec=00 delivery=ExINT dest=P s
On Wed, Oct 09, 2019 at 12:41:05PM +0200, Jan Beulich wrote:
> On 09.10.2019 12:11, Roger Pau Monné wrote:
> > And it does print the following when setting up the iommu:
> >
> > (XEN) ioapic 0 pin 0 not masked
> > (XEN) vec=00 delivery=ExINT dest=P status=0 polarity=0 irr=0 trig=E mask=0
> > des
On 09.10.2019 12:11, Roger Pau Monné wrote:
> And it does print the following when setting up the iommu:
>
> (XEN) ioapic 0 pin 0 not masked
> (XEN) vec=00 delivery=ExINT dest=P status=0 polarity=0 irr=0 trig=E mask=0
> dest_id:0001
>
> I wonder, shouldn't all pins of all the io-apics be ma
On Wed, Oct 09, 2019 at 11:31:59AM +0200, Jan Beulich wrote:
> On 08.10.2019 20:30, Andrew Cooper wrote:
> > Hello,
> >
> > I have no idea if this is a regression or not. I suspect it might not
> > be, and has always been broken.
> >
> > Either way, I'm seeing occasional single interrupt remappi
On 08.10.2019 20:30, Andrew Cooper wrote:
> Hello,
>
> I have no idea if this is a regression or not. I suspect it might not
> be, and has always been broken.
>
> Either way, I'm seeing occasional single interrupt remapping errors when
> booting a range of Intel systems
>
> (XEN) x2APIC mode is
Hello,
I have no idea if this is a regression or not. I suspect it might not
be, and has always been broken.
Either way, I'm seeing occasional single interrupt remapping errors when
booting a range of Intel systems
(XEN) x2APIC mode is already enabled by BIOS.
(XEN) Using APIC driver x2apic_clu
