>>> On 19.06.19 at 17:01, wrote:
> On 15/03/2019 11:04, Jan Beulich wrote:
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -479,7 +479,7 @@ static const struct ext0f38_table {
>> [0x4d] = { .simd_size = simd_scalar_vexw, .d8s = d8s_dq },
>
On 15/03/2019 11:04, Jan Beulich wrote:
> --- a/tools/tests/x86_emulator/x86-emulate.h
> +++ b/tools/tests/x86_emulator/x86-emulate.h
> @@ -144,6 +144,7 @@ static inline bool xcr0_mask(uint64_t ma
> #define cpu_has_avx512vl (cp.feat.avx512vl && xcr0_mask(0xe6))
> #define cpu_has_avx512_vbmi (cp.
As in a few cases before, since the insns here and in particular their
memory access patterns follow the usual scheme, I didn't think it was
necessary to add a contrived test specifically for them, beyond the
Disp8 scaling one.
Signed-off-by: Jan Beulich
---
v8: Re-base.
v7: New.
--- a/tools/tes
