Re: [Xen-devel] [PATCH v2 1/6] x86emul: fix FMA scalar operand sizes

2018-09-04 Thread Jan Beulich
>>> On 03.09.18 at 18:43, wrote: > On 29/08/18 15:23, Jan Beulich wrote: >> FMA insns, other than the earlier AVX additions, don't use the low >> opcode bit to distinguish between single and double vector elements. > > I think I've worked out why "other than the" is so weird to read as a > native

Re: [Xen-devel] [PATCH v2 1/6] x86emul: fix FMA scalar operand sizes

2018-09-03 Thread Andrew Cooper
On 29/08/18 15:23, Jan Beulich wrote: > FMA insns, other than the earlier AVX additions, don't use the low > opcode bit to distinguish between single and double vector elements. I think I've worked out why "other than the" is so weird to read as a native speaker here.  I think you mean "unlike the

[Xen-devel] [PATCH v2 1/6] x86emul: fix FMA scalar operand sizes

2018-08-29 Thread Jan Beulich
FMA insns, other than the earlier AVX additions, don't use the low opcode bit to distinguish between single and double vector elements. While the difference is benign for packed flavors, the scalar ones need to use VEX.W here. Oddly enough the table entries didn't even use simd_scalar_fp, but unifo