On Mon, Dec 04, 2017 at 07:13:52AM -0700, Jan Beulich wrote:
> >>> On 04.12.17 at 14:10, wrote:
> > On Mon, Dec 04, 2017 at 11:13:45AM +, Julien Grall wrote:
> >> I am not sure to understand why I am being CCed. But it looks like you CC
> >> everyone on each patch... Please CC only relevant pe
>>> On 04.12.17 at 14:10, wrote:
> On Mon, Dec 04, 2017 at 11:13:45AM +, Julien Grall wrote:
>> I am not sure to understand why I am being CCed. But it looks like you CC
>> everyone on each patch... Please CC only relevant person on each patch.
>>
>
> Apologies... I thought the whole pathse
On Mon, Dec 04, 2017 at 11:13:45AM +, Julien Grall wrote:
> Hello,
>
Hi Julien,
> I am not sure to understand why I am being CCed. But it looks like you CC
> everyone on each patch... Please CC only relevant person on each patch.
>
Apologies... I thought the whole pathset will provide mor
Hello,
I am not sure to understand why I am being CCed. But it looks like you
CC everyone on each patch... Please CC only relevant person on each patch.
Cheers,
On 04/12/17 00:15, Boqun Feng wrote:
From: Kai Huang
Expose SGX in CPU featureset for HVM domain. SGX will not be supported for
P
From: Kai Huang
Expose SGX in CPU featureset for HVM domain. SGX will not be supported for
PV domain, as ENCLS (which SGX driver in guest essentially runs) must run
in ring 0, while PV kernel runs in ring 3. Theoretically we can support SGX
in PV domain via either emulating #GP caused by ENCLS ru
