Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2019-05-07 Thread Jan Beulich
>>> On 07.05.19 at 18:22, wrote: > BTW I'm now deleting this from my inbox to avoid clutter. Jan, at such > time as you want me to review it, please ping or re-send. That's fine - this is meant to be re-worked. Just didn't get to it yet. Jan ___ Xe

Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2019-05-07 Thread George Dunlap
On 10/18/18 4:20 PM, George Dunlap wrote: > On 10/12/2018 03:19 PM, Jan Beulich wrote: > On 12.10.18 at 15:55, wrote: >>> On 11/09/18 14:10, Jan Beulich wrote: Emulation requiring device model assistance uses a form of instruction re-execution, assuming that the second (and any furth

Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2019-02-14 Thread Jan Beulich
>>> On 12.10.18 at 15:55, wrote: > On 11/09/18 14:10, Jan Beulich wrote: >> Emulation requiring device model assistance uses a form of instruction >> re-execution, assuming that the second (and any further) pass takes >> exactly the same path. This is a valid assumption as far as use of CPU >> reg

Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2018-11-09 Thread Jan Beulich
>>> On 12.10.18 at 15:55, wrote: While I haven't heard back on my earlier reply, nevertheless a few more thoughts. > First and foremost, I'd like recommend against trying to combine the fix > for repeated PDPTR reading, and repeated PTE reading. While they are > both repeated reading problems,

Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2018-10-18 Thread George Dunlap
On 10/12/2018 03:19 PM, Jan Beulich wrote: On 12.10.18 at 15:55, wrote: >> On 11/09/18 14:10, Jan Beulich wrote: >>> Emulation requiring device model assistance uses a form of instruction >>> re-execution, assuming that the second (and any further) pass takes >>> exactly the same path. This i

Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2018-10-12 Thread Jan Beulich
>>> On 12.10.18 at 15:55, wrote: > On 11/09/18 14:10, Jan Beulich wrote: >> Emulation requiring device model assistance uses a form of instruction >> re-execution, assuming that the second (and any further) pass takes >> exactly the same path. This is a valid assumption as far as use of CPU >> reg

Re: [Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2018-10-12 Thread Andrew Cooper
On 11/09/18 14:10, Jan Beulich wrote: > Emulation requiring device model assistance uses a form of instruction > re-execution, assuming that the second (and any further) pass takes > exactly the same path. This is a valid assumption as far as use of CPU > registers goes (as those can't change witho

[Xen-devel] [PATCH v2 0/4] x86/HVM: implement memory read caching

2018-09-11 Thread Jan Beulich
Emulation requiring device model assistance uses a form of instruction re-execution, assuming that the second (and any further) pass takes exactly the same path. This is a valid assumption as far as use of CPU registers goes (as those can't change without any other instruction executing in between)