On 28.08.2019 13:51, Andrew Cooper wrote:
On 28/08/2019 07:26, Jan Beulich wrote:
On 27.08.2019 18:04, Andrew Cooper wrote:
On 01/07/2019 12:58, Jan Beulich wrote:
@@ -9896,6 +9902,32 @@ x86_emulate(
: "0" ((uint32_t)src.val), "rm"
(_regs.edx) );
bre
On 28/08/2019 07:26, Jan Beulich wrote:
> On 27.08.2019 18:04, Andrew Cooper wrote:
>> On 01/07/2019 12:58, Jan Beulich wrote:
>>> @@ -9896,6 +9902,32 @@ x86_emulate(
>>> : "0" ((uint32_t)src.val), "rm"
>>> (_regs.edx) );
>>> break;
>>> + case X86EMUL
On 27.08.2019 18:04, Andrew Cooper wrote:
On 01/07/2019 12:58, Jan Beulich wrote:
@@ -9896,6 +9902,32 @@ x86_emulate(
: "0" ((uint32_t)src.val), "rm" (_regs.edx) );
break;
+case X86EMUL_OPC_66(0x0f38, 0xf8): /* movdir64b r,m512 */
+vcpu_
On 01/07/2019 12:58, Jan Beulich wrote:
> Note that the ISA extensions document revision 035 doesn't specify
> exception behavior for ModRM.mod != 0b11; assuming #UD here.
This has moved into the main SDM now. These instructions don't make
sense with reg/reg encodings, so I expect that encoding s
Note that the ISA extensions document revision 035 doesn't specify
exception behavior for ModRM.mod != 0b11; assuming #UD here.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -548,6 +548,8 @@ static const struct ext0f38_tab
