Re: [Xen-devel] [PATCH] x86/Intel: drop another 32-bit leftover

2017-12-20 Thread Andrew Cooper
On 06/12/17 16:18, Jan Beulich wrote: > None of the models MISC_ENABLE MSR access is excluded for support 64-bit > mode - drop the conditional from early_init_intel(). Also convert > pointless rdmsr_safe() elsewhere to rdmsrl(). > > Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper

[Xen-devel] [PATCH] x86/Intel: drop another 32-bit leftover

2017-12-06 Thread Jan Beulich
None of the models MISC_ENABLE MSR access is excluded for support 64-bit mode - drop the conditional from early_init_intel(). Also convert pointless rdmsr_safe() elsewhere to rdmsrl(). Signed-off-by: Jan Beulich --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -285,31 +285,29 @@