Hi Julien,
> -Original Message-
> From: Julien Grall
> Subject: Re: [XEN v2] GICv3: Emulate GICR_PENDBASER correctly for 32 bit
> guests
>
> (+Henry)
>
> Hi Ayan,
>
> Adding Henry because this is something we probably want to fix in Xen
> 4.17. AFAIU
(+Henry)
Hi Ayan,
Adding Henry because this is something we probably want to fix in Xen
4.17. AFAIU, the value is not used at all in Xen, so the risk is mostly
returning a wrong value to a domain using GICv3 ITS (not officially
supported and only expose to dom0 so far). Therefore, I would say
Hi Ayan,
> On 24 Oct 2022, at 20:30, Ayan Kumar Halder wrote:
>
> If a guest is running in 32 bit mode and it tries to access
> "GICR_PENDBASER + 4" mmio reg, it will be trapped to Xen. vreg_reg64_extract()
> will return the value stored "v->arch.vgic.rdist_pendbase + 4".
> This will be stored i
On Mon, 24 Oct 2022 20:30:02 +0100
Ayan Kumar Halder wrote:
Hi,
> If a guest is running in 32 bit mode and it tries to access
> "GICR_PENDBASER + 4" mmio reg, it will be trapped to Xen. vreg_reg64_extract()
> will return the value stored "v->arch.vgic.rdist_pendbase + 4".
> This will be stored i
If a guest is running in 32 bit mode and it tries to access
"GICR_PENDBASER + 4" mmio reg, it will be trapped to Xen. vreg_reg64_extract()
will return the value stored "v->arch.vgic.rdist_pendbase + 4".
This will be stored in a 32bit register.
The 32bit register is then modified bitwise with a mas
