On 23.04.25 11:03, Xin Li wrote:
On 4/22/2025 4:12 AM, Jürgen Groß wrote:
+
+static __always_inline bool __rdmsrq(u32 msr, u64 *val, int type)
+{
+ bool ret;
+
+#ifdef CONFIG_XEN_PV
+ if (cpu_feature_enabled(X86_FEATURE_XENPV))
+ return __xenpv_rdmsrq(msr, val, type);
I don't thin
On 4/22/2025 4:12 AM, Jürgen Groß wrote:
+
+static __always_inline bool __rdmsrq(u32 msr, u64 *val, int type)
+{
+ bool ret;
+
+#ifdef CONFIG_XEN_PV
+ if (cpu_feature_enabled(X86_FEATURE_XENPV))
+ return __xenpv_rdmsrq(msr, val, type);
I don't think this will work for the Xen PV ca
On 22.04.25 10:22, Xin Li (Intel) wrote:
To eliminate the indirect call overhead introduced by the pv_ops API,
utilize the alternatives mechanism to read MSR:
1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
disabled feature, preventing the Xen code from being built
On 22.04.25 11:20, Xin Li wrote:
On 4/22/2025 1:59 AM, Jürgen Groß wrote:
On 22.04.25 10:22, Xin Li (Intel) wrote:
To eliminate the indirect call overhead introduced by the pv_ops API,
utilize the alternatives mechanism to read MSR:
1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV bec
On 4/22/2025 1:59 AM, Jürgen Groß wrote:
On 22.04.25 10:22, Xin Li (Intel) wrote:
To eliminate the indirect call overhead introduced by the pv_ops API,
utilize the alternatives mechanism to read MSR:
1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
disabled feature, p
On 22.04.25 10:22, Xin Li (Intel) wrote:
To eliminate the indirect call overhead introduced by the pv_ops API,
utilize the alternatives mechanism to read MSR:
1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
disabled feature, preventing the Xen code from being built
To eliminate the indirect call overhead introduced by the pv_ops API,
utilize the alternatives mechanism to read MSR:
1) When built with !CONFIG_XEN_PV, X86_FEATURE_XENPV becomes a
disabled feature, preventing the Xen code from being built
and ensuring the native code is executed