Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-24 Thread Roger Pau Monné
On Wed, Feb 23, 2022 at 05:31:53PM +0100, Jan Beulich wrote: > On 23.02.2022 17:11, Roger Pau Monné wrote: > > On Wed, Feb 23, 2022 at 09:38:56AM -0600, Alex Olson wrote: > >> 1) For conditions in which MSR registers are writeable from PV guests > >> (such as > >> dom0), they should probably be r

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-23 Thread Jan Beulich
On 23.02.2022 17:11, Roger Pau Monné wrote: > On Wed, Feb 23, 2022 at 09:38:56AM -0600, Alex Olson wrote: >> 1) For conditions in which MSR registers are writeable from PV guests (such >> as >> dom0), they should probably be readable well, looks like >> MSR_IA32_THERM_CONTROL >> is currently one

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-23 Thread Jan Beulich
On 23.02.2022 16:38, Alex Olson wrote: > It seems to me there are a few findings useful to the Xen developers from > venturing down this rabbithole: > > 1) For conditions in which MSR registers are writeable from PV guests (such as > dom0), they should probably be readable well, looks like > MSR

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-23 Thread Roger Pau Monné
On Wed, Feb 23, 2022 at 09:38:56AM -0600, Alex Olson wrote: > I appreciate your interest, apologies for not replying right away. I've been > digging deeper to have a more meaningful resposne. > > I had attempted to instrument the MSR reads, but only saw a small number reads > being blocked by the

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-23 Thread Alex Olson
Hi Roger, See my other reply which is more detailed. While enabling reads of "MSR_IA32_ENERGY_PERF_BIAS" did not cause any effect in my case, it is one of a handful of exceptions in which MSRs are writeable but not readable. I believe this may result in potentially unexpected behavior in read-ch

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-23 Thread Alex Olson
I appreciate your interest, apologies for not replying right away. I've been digging deeper to have a more meaningful resposne. I had attempted to instrument the MSR reads, but only saw a small number reads being blocked by the code change. They appear to be the list below and the others seem fair

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-11 Thread Roger Pau Monné
On Thu, Feb 10, 2022 at 11:27:15AM -0600, Alex Olson wrote: > I'm seeing strange performance issues under Xen on a Supermicro server with a > Xeon D-1541 CPU caused by an MSR-related commit. > > Commit 322ec7c89f6640ee2a99d1040b6f786cf04872cf 'x86/pv: disallow access to > unknown MSRs' > surpris

Re: [RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-10 Thread Andrew Cooper
On 10/02/2022 17:27, Alex Olson wrote: > I'm seeing strange performance issues under Xen on a Supermicro server with a > Xeon D-1541 CPU caused by an MSR-related commit. > > Commit 322ec7c89f6640ee2a99d1040b6f786cf04872cf 'x86/pv: disallow access to > unknown MSRs' > surprisingly introduces a sev

[RFC] Avoid dom0/HVM performance penalty from MSR access tightening

2022-02-10 Thread Alex Olson
I'm seeing strange performance issues under Xen on a Supermicro server with a Xeon D-1541 CPU caused by an MSR-related commit. Commit 322ec7c89f6640ee2a99d1040b6f786cf04872cf 'x86/pv: disallow access to unknown MSRs' surprisingly introduces a severe performance penality where dom0 has about 1/8t