> On 22 May 2023, at 13:41, Jan Beulich wrote:
>
> On 22.05.2023 12:20, Luca Fancellu wrote:
>>
>>
>>> On 18 May 2023, at 19:30, Julien Grall wrote:
>>>
>>> Hi Luca,
>>>
>>> One more remark.
>>>
>>> On 24/04/2023 07:02, Luca Fancellu wrote:
#else /* !CONFIG_ARM64_SVE */
@@ -46,6
On 22.05.2023 12:20, Luca Fancellu wrote:
>
>
>> On 18 May 2023, at 19:30, Julien Grall wrote:
>>
>> Hi Luca,
>>
>> One more remark.
>>
>> On 24/04/2023 07:02, Luca Fancellu wrote:
>>> #else /* !CONFIG_ARM64_SVE */
>>> @@ -46,6 +50,15 @@ static inline unsigned int get_sys_vl_len(void)
>>>
> On 18 May 2023, at 19:30, Julien Grall wrote:
>
> Hi Luca,
>
> One more remark.
>
> On 24/04/2023 07:02, Luca Fancellu wrote:
>> #else /* !CONFIG_ARM64_SVE */
>> @@ -46,6 +50,15 @@ static inline unsigned int get_sys_vl_len(void)
>> return 0;
>> }
>> +static inline int sve_context_i
Hi,
On 19/05/2023 18:35, Luca Fancellu wrote:
On 18 May 2023, at 19:27, Julien Grall wrote:
Hi Luca,
On 24/04/2023 07:02, Luca Fancellu wrote:
Save/restore context switch for SVE, allocate memory to contain
the Z0-31 registers whose length is maximum 2048 bits each and
FFR who can be maxi
> On 18 May 2023, at 19:27, Julien Grall wrote:
>
> Hi Luca,
>
> On 24/04/2023 07:02, Luca Fancellu wrote:
>> Save/restore context switch for SVE, allocate memory to contain
>> the Z0-31 registers whose length is maximum 2048 bits each and
>> FFR who can be maximum 256 bits, the allocated memo
Hi Luca,
One more remark.
On 24/04/2023 07:02, Luca Fancellu wrote:
#else /* !CONFIG_ARM64_SVE */
@@ -46,6 +50,15 @@ static inline unsigned int get_sys_vl_len(void)
return 0;
}
+static inline int sve_context_init(struct vcpu *v)
+{
+return 0;
The call is protected by is_
Hi Luca,
On 24/04/2023 07:02, Luca Fancellu wrote:
Save/restore context switch for SVE, allocate memory to contain
the Z0-31 registers whose length is maximum 2048 bits each and
FFR who can be maximum 256 bits, the allocated memory depends on
how many bits is the vector length for the domain and
Save/restore context switch for SVE, allocate memory to contain
the Z0-31 registers whose length is maximum 2048 bits each and
FFR who can be maximum 256 bits, the allocated memory depends on
how many bits is the vector length for the domain and how many bits
are supported by the platform.
Save P0
