Hi,
> On 10 Dec 2020, at 15:45, Julien Grall wrote:
>
> Hi Bertrand,
>
> On 10/12/2020 15:14, Bertrand Marquis wrote:
>> Hi Julien,
>>> On 9 Dec 2020, at 23:03, Julien Grall wrote:
>>>
>>> Hi Bertrand,
>>>
>>> On 09/12/2020 16:30, Bertrand Marquis wrote:
Add definition and entries in cp
Hi Bertrand,
On 10/12/2020 15:14, Bertrand Marquis wrote:
Hi Julien,
On 9 Dec 2020, at 23:03, Julien Grall wrote:
Hi Bertrand,
On 09/12/2020 16:30, Bertrand Marquis wrote:
Add definition and entries in cpuinfo for ID registers introduced in
newer Arm Architecture reference manual:
- ID_PFR
Hi Julien,
> On 9 Dec 2020, at 23:03, Julien Grall wrote:
>
> Hi Bertrand,
>
> On 09/12/2020 16:30, Bertrand Marquis wrote:
>> Add definition and entries in cpuinfo for ID registers introduced in
>> newer Arm Architecture reference manual:
>> - ID_PFR2: processor feature register 2
>> - ID_DFR1
Hi Bertrand,
On 09/12/2020 16:30, Bertrand Marquis wrote:
Add definition and entries in cpuinfo for ID registers introduced in
newer Arm Architecture reference manual:
- ID_PFR2: processor feature register 2
- ID_DFR1: debug feature register 1
- ID_MMFR4 and ID_MMFR5: Memory model feature regist
On Wed, 9 Dec 2020, Bertrand Marquis wrote:
> Add definition and entries in cpuinfo for ID registers introduced in
> newer Arm Architecture reference manual:
> - ID_PFR2: processor feature register 2
> - ID_DFR1: debug feature register 1
> - ID_MMFR4 and ID_MMFR5: Memory model feature registers 4 a
Add definition and entries in cpuinfo for ID registers introduced in
newer Arm Architecture reference manual:
- ID_PFR2: processor feature register 2
- ID_DFR1: debug feature register 1
- ID_MMFR4 and ID_MMFR5: Memory model feature registers 4 and 5
- ID_ISA6: ISA Feature register 6
Add more bitfie
