Re: [PATCH v2 5/5] amd/iommu: force atomic updates of remapping entries

2023-07-19 Thread Roger Pau Monné
On Wed, Jul 19, 2023 at 02:46:49PM +0200, Jan Beulich wrote: > On 18.07.2023 14:43, Roger Pau Monne wrote: > > Disable XT (x2APIC) support and thus 128 IRTE entries if cmpxchg16b is > > not available, do so in order to avoid having to disable the IRTE (and > > possibly loose interrupts) when updati

Re: [PATCH v2 5/5] amd/iommu: force atomic updates of remapping entries

2023-07-19 Thread Jan Beulich
On 18.07.2023 14:43, Roger Pau Monne wrote: > Disable XT (x2APIC) support and thus 128 IRTE entries if cmpxchg16b is > not available, do so in order to avoid having to disable the IRTE (and > possibly loose interrupts) when updating the entry. Note this also > removes the usage of a while loop in

[PATCH v2 5/5] amd/iommu: force atomic updates of remapping entries

2023-07-18 Thread Roger Pau Monne
Disable XT (x2APIC) support and thus 128 IRTE entries if cmpxchg16b is not available, do so in order to avoid having to disable the IRTE (and possibly loose interrupts) when updating the entry. Note this also removes the usage of a while loop in order to disable the entry, since RemapEn is no long