On 26.06.2025 14:17, Teddy Astie wrote:
> Le 26/06/2025 à 13:46, Juergen Gross a écrit :
>> On 26.06.25 13:34, Oleksii Kurochko wrote:
>>>
>>> On 6/26/25 12:41 PM, Jan Beulich wrote:
>>> - Minimized inter-CPU TLB flushes — since VMIDs are local, TLB entries
>>> don’t need
>>> to be invalidated
On 6/26/25 2:16 PM, Jan Beulich wrote:
On 26.06.2025 13:34, Oleksii Kurochko wrote:
On 6/26/25 12:41 PM, Jan Beulich wrote:
On 26.06.2025 12:05, Oleksii Kurochko wrote:
On 6/24/25 4:01 PM, Jan Beulich wrote:
On 24.06.2025 15:47, Oleksii Kurochko wrote:
On 6/24/25 12:44 PM, Jan Beulich wrote
Le 26/06/2025 à 13:46, Juergen Gross a écrit :
> On 26.06.25 13:34, Oleksii Kurochko wrote:
>>
>> On 6/26/25 12:41 PM, Jan Beulich wrote:
>> - Minimized inter-CPU TLB flushes — since VMIDs are local, TLB entries
>> don’t need
>> to be invalidated on other CPUs when reused.
>> - Better scalabilit
On 26.06.2025 13:34, Oleksii Kurochko wrote:
>
> On 6/26/25 12:41 PM, Jan Beulich wrote:
>> On 26.06.2025 12:05, Oleksii Kurochko wrote:
>>> On 6/24/25 4:01 PM, Jan Beulich wrote:
On 24.06.2025 15:47, Oleksii Kurochko wrote:
> On 6/24/25 12:44 PM, Jan Beulich wrote:
>> On 24.06.2025 1
On 6/26/25 1:43 PM, Juergen Gross wrote:
On 26.06.25 13:34, Oleksii Kurochko wrote:
On 6/26/25 12:41 PM, Jan Beulich wrote:
On 26.06.2025 12:05, Oleksii Kurochko wrote:
On 6/24/25 4:01 PM, Jan Beulich wrote:
On 24.06.2025 15:47, Oleksii Kurochko wrote:
On 6/24/25 12:44 PM, Jan Beulich wrot
On 26.06.25 13:34, Oleksii Kurochko wrote:
On 6/26/25 12:41 PM, Jan Beulich wrote:
On 26.06.2025 12:05, Oleksii Kurochko wrote:
On 6/24/25 4:01 PM, Jan Beulich wrote:
On 24.06.2025 15:47, Oleksii Kurochko wrote:
On 6/24/25 12:44 PM, Jan Beulich wrote:
On 24.06.2025 11:46, Oleksii Kurochko w
On 6/26/25 12:41 PM, Jan Beulich wrote:
On 26.06.2025 12:05, Oleksii Kurochko wrote:
On 6/24/25 4:01 PM, Jan Beulich wrote:
On 24.06.2025 15:47, Oleksii Kurochko wrote:
On 6/24/25 12:44 PM, Jan Beulich wrote:
On 24.06.2025 11:46, Oleksii Kurochko wrote:
On 6/18/25 5:46 PM, Jan Beulich wrote
On 26.06.2025 12:05, Oleksii Kurochko wrote:
>
> On 6/24/25 4:01 PM, Jan Beulich wrote:
>> On 24.06.2025 15:47, Oleksii Kurochko wrote:
>>> On 6/24/25 12:44 PM, Jan Beulich wrote:
On 24.06.2025 11:46, Oleksii Kurochko wrote:
> On 6/18/25 5:46 PM, Jan Beulich wrote:
>> On 10.06.2025 15
On 6/24/25 4:01 PM, Jan Beulich wrote:
On 24.06.2025 15:47, Oleksii Kurochko wrote:
On 6/24/25 12:44 PM, Jan Beulich wrote:
On 24.06.2025 11:46, Oleksii Kurochko wrote:
On 6/18/25 5:46 PM, Jan Beulich wrote:
On 10.06.2025 15:05, Oleksii Kurochko wrote:
--- /dev/null
+++ b/xen/arch/riscv/p2m
On 24.06.2025 11:46, Oleksii Kurochko wrote:
> On 6/18/25 5:46 PM, Jan Beulich wrote:
>> On 10.06.2025 15:05, Oleksii Kurochko wrote:
>>> --- /dev/null
>>> +++ b/xen/arch/riscv/p2m.c
>>> @@ -0,0 +1,115 @@
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +#include
>>> +
>>> +#include
On 24.06.2025 15:47, Oleksii Kurochko wrote:
> On 6/24/25 12:44 PM, Jan Beulich wrote:
>> On 24.06.2025 11:46, Oleksii Kurochko wrote:
>>> On 6/18/25 5:46 PM, Jan Beulich wrote:
On 10.06.2025 15:05, Oleksii Kurochko wrote:
> --- /dev/null
> +++ b/xen/arch/riscv/p2m.c
> @@ -0,0 +1,1
On 6/24/25 4:01 PM, Jan Beulich wrote:
+sbi_remote_hfence_gvma_vmid(d->dirty_cpumask, 0, 0, p2m->vmid);
You're creating d; it cannot possibly have run on any CPU yet. IOW
d->dirty_cpumask will be reliably empty here. I think it would be hard to
avoid issuing the flush to all CPUs here i
On 6/24/25 12:44 PM, Jan Beulich wrote:
On 24.06.2025 11:46, Oleksii Kurochko wrote:
On 6/18/25 5:46 PM, Jan Beulich wrote:
On 10.06.2025 15:05, Oleksii Kurochko wrote:
--- /dev/null
+++ b/xen/arch/riscv/p2m.c
@@ -0,0 +1,115 @@
+#include
+#include
+#include
+#include
+#include
+
+#includ
On 6/18/25 5:46 PM, Jan Beulich wrote:
On 10.06.2025 15:05, Oleksii Kurochko wrote:
Implementation is based on Arm code with some minor changes:
- Re-define INVALID_VMID.
- Re-define MAX_VMID.
- Add TLB flushing when VMID is re-used.
Also, as a part of this path structure p2m_domain is i
On 10.06.2025 15:05, Oleksii Kurochko wrote:
> Implementation is based on Arm code with some minor changes:
> - Re-define INVALID_VMID.
> - Re-define MAX_VMID.
> - Add TLB flushing when VMID is re-used.
>
> Also, as a part of this path structure p2m_domain is introduced with
> vmid member insid
Implementation is based on Arm code with some minor changes:
- Re-define INVALID_VMID.
- Re-define MAX_VMID.
- Add TLB flushing when VMID is re-used.
Also, as a part of this path structure p2m_domain is introduced with
vmid member inside it. It is necessary for VMID management functions.
Add a
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