Re: [PATCH v2] x86emul: adjust BSF/BSR/LZCNT/TZCNT behavior as to EFLAGS

2025-07-15 Thread Jan Beulich
On 14.07.2025 18:19, Andrew Cooper wrote: > On 14/07/2025 5:02 pm, Jan Beulich wrote: >> --- a/xen/arch/x86/x86_emulate/x86_emulate.c >> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c >> @@ -5270,62 +5270,26 @@ x86_emulate( >> break; >> >> case X86EMUL_OPC(0x0f, 0xbc): /* bsf or tzcnt

Re: [PATCH v2] x86emul: adjust BSF/BSR/LZCNT/TZCNT behavior as to EFLAGS

2025-07-15 Thread Jan Beulich
On 14.07.2025 18:19, Andrew Cooper wrote: > On 14/07/2025 5:02 pm, Jan Beulich wrote: >> SDM revision 087 points out that apparently as of quite some time ago on >> Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF. >> Because of the inconsistency (and because documentation doe

Re: [PATCH v2] x86emul: adjust BSF/BSR/LZCNT/TZCNT behavior as to EFLAGS

2025-07-14 Thread Andrew Cooper
On 14/07/2025 5:02 pm, Jan Beulich wrote: > SDM revision 087 points out that apparently as of quite some time ago on > Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF. > Because of the inconsistency (and because documentation doesn't look to It's probably worth saying errata

[PATCH v2] x86emul: adjust BSF/BSR/LZCNT/TZCNT behavior as to EFLAGS

2025-07-14 Thread Jan Beulich
SDM revision 087 points out that apparently as of quite some time ago on Intel hardware BSF and BSR may alter all arithmetic flags, not just ZF. Because of the inconsistency (and because documentation doesn't look to be quite right about PF), best we can do is simply take the flag values from what