Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-06 Thread Ayan Kumar Halder
On 06/06/2025 13:43, Ayan Kumar Halder wrote: Hi Michal, On 06/06/2025 11:13, Orzel, Michal wrote: On 05/06/2025 15:39, Ayan Kumar Halder wrote: Hi Michal, On 05/06/2025 08:06, Orzel, Michal wrote: On 04/06/2025 19:43, Ayan Kumar Halder wrote: Introduce pr_t typedef which is a structure h

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-06 Thread Ayan Kumar Halder
Hi Michal, On 06/06/2025 11:13, Orzel, Michal wrote: On 05/06/2025 15:39, Ayan Kumar Halder wrote: Hi Michal, On 05/06/2025 08:06, Orzel, Michal wrote: On 04/06/2025 19:43, Ayan Kumar Halder wrote: Introduce pr_t typedef which is a structure having the prbar and prlar members, each being st

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-06 Thread Orzel, Michal
On 05/06/2025 15:39, Ayan Kumar Halder wrote: > Hi Michal, > > On 05/06/2025 08:06, Orzel, Michal wrote: >> >> On 04/06/2025 19:43, Ayan Kumar Halder wrote: >>> Introduce pr_t typedef which is a structure having the prbar and prlar >>> members, >>> each being structured as the registers of the

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-05 Thread Ayan Kumar Halder
Hi Michal, On 05/06/2025 08:06, Orzel, Michal wrote: On 04/06/2025 19:43, Ayan Kumar Halder wrote: Introduce pr_t typedef which is a structure having the prbar and prlar members, each being structured as the registers of the AArch32 Armv8-R architecture. Also, define MPU_REGION_RES0 to 0 as t

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-05 Thread Luca Fancellu
Hi Ayan, >>> +/* Hypervisor Protection Region Base Address Register */ >>> +typedef union { >>> +struct { >>> +unsigned int xn:1; /* Execute-Never */ >>> +unsigned int ap_0:1; /* Acess Permission */ >>> +unsigned long ro:1; /* Access Permission AP[1] */ >

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-05 Thread Ayan Kumar Halder
On 04/06/2025 20:19, Luca Fancellu wrote: Hi Ayan, Hi Luca, On 4 Jun 2025, at 18:43, Ayan Kumar Halder wrote: Introduce pr_t typedef which is a structure having the prbar and prlar members, each being structured as the registers of the AArch32 Armv8-R architecture. Also, define MPU_REGIO

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-05 Thread Orzel, Michal
On 04/06/2025 19:43, Ayan Kumar Halder wrote: > Introduce pr_t typedef which is a structure having the prbar and prlar > members, > each being structured as the registers of the AArch32 Armv8-R architecture. > > Also, define MPU_REGION_RES0 to 0 as there are no reserved 0 bits beyond the > BAS

Re: [PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-04 Thread Luca Fancellu
Hi Ayan, > On 4 Jun 2025, at 18:43, Ayan Kumar Halder wrote: > > Introduce pr_t typedef which is a structure having the prbar and prlar > members, > each being structured as the registers of the AArch32 Armv8-R architecture. > > Also, define MPU_REGION_RES0 to 0 as there are no reserved 0 bits

[PATCH v1 1/3] arm/mpu: Introduce MPU memory region map structure

2025-06-04 Thread Ayan Kumar Halder
Introduce pr_t typedef which is a structure having the prbar and prlar members, each being structured as the registers of the AArch32 Armv8-R architecture. Also, define MPU_REGION_RES0 to 0 as there are no reserved 0 bits beyond the BASE or LIMIT bitfields in prbar or prlar respectively. Move pr_