- 17 cze 2020 o 18:19, Andrew Cooper andrew.coop...@citrix.com napisał(a):
> On 17/06/2020 04:02, Tamas K Lengyel wrote:
>> On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper
>> wrote:
>>> On 16/06/2020 19:47, Michał Leszczyński wrote:
- 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@
On Wed, Jun 17, 2020 at 10:20:20PM +0200, Michał Leszczyński wrote:
> - 17 cze 2020 o 18:19, Andrew Cooper andrew.coop...@citrix.com napisał(a):
>
> > On 17/06/2020 04:02, Tamas K Lengyel wrote:
> >> On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper
> >> wrote:
> >>> On 16/06/2020 19:47, Michał
On Thu, Jun 18, 2020 at 02:56:17AM +0200, Michał Leszczyński wrote:
> - 18 cze 2020 o 1:29, Kang, Luwei luwei.k...@intel.com napisał(a):
>
> >> > > How does KVM deal with this, do they insert/modify trace packets on
> >> > > trapped and emulated instructions by the VMM?
> >> >
> >> > The KVM i
- 18 cze 2020 o 1:29, Kang, Luwei luwei.k...@intel.com napisał(a):
>> > > How does KVM deal with this, do they insert/modify trace packets on
>> > > trapped and emulated instructions by the VMM?
>> >
>> > The KVM includes instruction decoder and
>> emulator(arch/x86/kvm/emulate.c), and the gue
> > > How does KVM deal with this, do they insert/modify trace packets on
> > > trapped and emulated instructions by the VMM?
> >
> > The KVM includes instruction decoder and
> emulator(arch/x86/kvm/emulate.c), and the guest's memory can be set to
> write-protect as well. But it doesn't support Int
- 17 cze 2020 o 18:19, Andrew Cooper andrew.coop...@citrix.com napisał(a):
> On 17/06/2020 04:02, Tamas K Lengyel wrote:
>> On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper
>> wrote:
>>> On 16/06/2020 19:47, Michał Leszczyński wrote:
- 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@
- 17 cze 2020 o 18:27, Tamas K Lengyel tamas.k.leng...@gmail.com napisał(a):
> On Wed, Jun 17, 2020 at 10:19 AM Andrew Cooper
> wrote:
>>
>> On 17/06/2020 04:02, Tamas K Lengyel wrote:
>> > On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper
>> > wrote:
>> >> On 16/06/2020 19:47, Michał Leszczyńs
On Wed, Jun 17, 2020 at 11:23 AM Andrew Cooper
wrote:
>
> On 17/06/2020 17:27, Tamas K Lengyel wrote:
> >> What semantics do you want for the buffer becoming full? Given that
> >> debugging/tracing is the goal, I presume "pause vcpu on full" is the
> >> preferred behaviour, rather tha
On 17/06/2020 17:27, Tamas K Lengyel wrote:
>> What semantics do you want for the buffer becoming full? Given that
>> debugging/tracing is the goal, I presume "pause vcpu on full" is the
>> preferred behaviour, rather than drop packets on full?
>>
> Right now this is a ring-sty
On Wed, Jun 17, 2020 at 10:19 AM Andrew Cooper
wrote:
>
> On 17/06/2020 04:02, Tamas K Lengyel wrote:
> > On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper
> > wrote:
> >> On 16/06/2020 19:47, Michał Leszczyński wrote:
> >>> - 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@citrix.com
> >>> n
On 17/06/2020 04:02, Tamas K Lengyel wrote:
> On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper
> wrote:
>> On 16/06/2020 19:47, Michał Leszczyński wrote:
>>> - 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@citrix.com
>>> napisał(a):
>>>
Are there any restrictions on EPT being enabled i
On Wed, Jun 17, 2020 at 12:37:13PM +, Kang, Luwei wrote:
> > How does KVM deal with this, do they insert/modify trace packets on trapped
> > and emulated instructions by the VMM?
>
> The KVM includes instruction decoder and emulator(arch/x86/kvm/emulate.c),
> and the guest's memory can be set
> ; Nakajima, Jun ;
> > > George Dunlap ; Ian Jackson
> > > ; Julien Grall ; Stefano
> > > Stabellini ; Kang, Luwei
> > >
> > > Subject: RE: [PATCH v1 0/7] Implement support for external IPT
> > > monitoring
> > >
> > > +Luwei
ger Pau Monné
> > ; Nakajima, Jun ; George
> > Dunlap ; Ian Jackson ;
> > Julien Grall ; Stefano Stabellini ;
> > Kang, Luwei
> > Subject: RE: [PATCH v1 0/7] Implement support for external IPT monitoring
> >
> > +Luwei, who developed PT for KVM and is the
ano Stabellini ;
> Kang, Luwei
> Subject: RE: [PATCH v1 0/7] Implement support for external IPT monitoring
>
> +Luwei, who developed PT for KVM and is the best one who can help
> review VMX changes from Intel side. Please include him in future post or
> discussion.
>
> >
On Tue, Jun 16, 2020 at 2:17 PM Andrew Cooper wrote:
>
> On 16/06/2020 19:47, Michał Leszczyński wrote:
> > - 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@citrix.com
> > napisał(a):
> >
> >> Are there any restrictions on EPT being enabled in the first place? I'm
> >> not aware of any, a
Xen-devel ; Jan Beulich
> ; Wei Liu ; Roger Pau Monné
> ; Nakajima, Jun ; Tian,
> Kevin ; George Dunlap ;
> Ian Jackson ; Julien Grall ;
> Stefano Stabellini
> Subject: Re: [PATCH v1 0/7] Implement support for external IPT monitoring
>
> - 16 cze 2020 o 20:17, Andrew Coope
On 16/06/2020 19:47, Michał Leszczyński wrote:
> - 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@citrix.com napisał(a):
>
>> Are there any restrictions on EPT being enabled in the first place? I'm
>> not aware of any, and in principle we could use this functionality for
>> PV guests as wel
- 16 cze 2020 o 20:17, Andrew Cooper andrew.coop...@citrix.com napisał(a):
> On 16/06/2020 16:16, Michał Leszczyński wrote:
>> Intel Processor Trace is an architectural extension available in modern Intel
>> family CPUs. It allows recording the detailed trace of activity while the
>> processor
On 16/06/2020 16:16, Michał Leszczyński wrote:
> Intel Processor Trace is an architectural extension available in modern Intel
> family CPUs. It allows recording the detailed trace of activity while the
> processor executes the code. One might use the recorded trace to reconstruct
> the code flo
Intel Processor Trace is an architectural extension available in modern Intel
family CPUs. It allows recording the detailed trace of activity while the
processor executes the code. One might use the recorded trace to reconstruct
the code flow. It means, to find out the executed code paths, deter
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