On 19.02.2025 18:56, Oleksii Kurochko wrote:
>
> On 2/18/25 6:03 PM, Jan Beulich wrote:
>>> --- a/xen/arch/riscv/arch.mk
>>> +++ b/xen/arch/riscv/arch.mk
>>> @@ -6,8 +6,13 @@ $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
>>> riscv-abi-$(CONFIG_RISCV_32) := -mabi=ilp32
>>> riscv-abi
On 2/18/25 6:03 PM, Jan Beulich wrote:
--- a/xen/arch/riscv/arch.mk
+++ b/xen/arch/riscv/arch.mk
@@ -6,8 +6,13 @@ $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
riscv-abi-$(CONFIG_RISCV_32) := -mabi=ilp32
riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
-riscv-march-$(CONFIG_RISCV_IS
On 19.02.2025 15:55, Oleksii Kurochko wrote:
> On 2/18/25 6:03 PM, Jan Beulich wrote:
>> On 12.02.2025 17:50, Oleksii Kurochko wrote:
>>> --- a/xen/arch/riscv/Kconfig
>>> +++ b/xen/arch/riscv/Kconfig
>>> @@ -28,16 +28,6 @@ choice
>>> help
>>> This selects the base ISA extensions that Xen
On 2/18/25 6:03 PM, Jan Beulich wrote:
On 12.02.2025 17:50, Oleksii Kurochko wrote:
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -28,16 +28,6 @@ choice
help
This selects the base ISA extensions that Xen will target.
-config RISCV_ISA_RV64G
- bool "RV6
On 12.02.2025 17:50, Oleksii Kurochko wrote:
> --- a/xen/arch/riscv/Kconfig
> +++ b/xen/arch/riscv/Kconfig
> @@ -28,16 +28,6 @@ choice
> help
> This selects the base ISA extensions that Xen will target.
>
> -config RISCV_ISA_RV64G
> - bool "RV64G"
> - help
> - Use the
'G' stands for "imafd_zicsr_zifencei".
Extensions 'f' and 'd' aren't really needed for Xen, and allowing floating
point registers to be used can lead to crashes.
Extensions 'i', 'm', 'a', 'zicsr', and 'zifencei' are necessary for the
operation of Xen, which is why they are used explicitly (uncond
