Re: [PATCH 1/8] x86/vmx: handle writes to MISC_ENABLE MSR

2020-08-18 Thread Andrew Cooper
On 17/08/2020 16:57, Roger Pau Monne wrote: > Such handling consist in checking that no bits have been changed from > the read value, if that's the case silently drop the write, otherwise > inject a fault. > > At least Windows guests will expect to write to the MISC_ENABLE MSR > with the same value

[PATCH 1/8] x86/vmx: handle writes to MISC_ENABLE MSR

2020-08-17 Thread Roger Pau Monne
Such handling consist in checking that no bits have been changed from the read value, if that's the case silently drop the write, otherwise inject a fault. At least Windows guests will expect to write to the MISC_ENABLE MSR with the same value that's been read from it. Signed-off-by: Roger Pau Mo