regards,
Henry
> -Original Message-
> Subject: [PATCH 0/5] x86/lbr: handle lack of model-specific LBRs
>
> Hello,
>
> Intel Sapphire Rapids CPUs doesn't have model-specific MSRs, and hence
> only architectural LBRs are available.
>
> Firstly implement
=643625
Kind regards,
Henry
> -Original Message-
> From: Xen-devel On Behalf Of
> Roger Pau Monne
> Subject: [PATCH 0/5] x86/lbr: handle lack of model-specific LBRs
>
> Hello,
>
> Intel Sapphire Rapids CPUs doesn't have model-specific MSRs, and hence
Hello,
Intel Sapphire Rapids CPUs doesn't have model-specific MSRs, and hence
only architectural LBRs are available.
Firstly implement some changes so Xen knows how to enable arch LBRs so
that the ler option can also work in such scenario (first two patches).
The lack of model-specific LBRs also
