On 11.03.2025 22:27, Andrew Cooper wrote:
> On 11/03/2025 9:22 pm, Andrew Cooper wrote:
>> When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
>>
>> This causes the XSA-259 PoC to fail with:
>>
>> --- Xen Test Framework ---
>> Environment: PV 64bit (Long mode 4 levels)
>> XSA-259 PoC
On 11/03/2025 11:36 pm, Andrew Cooper wrote:
> On 11/03/2025 9:27 pm, Andrew Cooper wrote:
>> On 11/03/2025 9:22 pm, Andrew Cooper wrote:
>>> When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
>>>
>>> This causes the XSA-259 PoC to fail with:
>>>
>>> --- Xen Test Framework ---
>>> Envi
On 11/03/2025 9:27 pm, Andrew Cooper wrote:
> On 11/03/2025 9:22 pm, Andrew Cooper wrote:
>> When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
>>
>> This causes the XSA-259 PoC to fail with:
>>
>> --- Xen Test Framework ---
>> Environment: PV 64bit (Long mode 4 levels)
>> XSA-259 Po
Hi Andrew,
> On 11 Mar 2025, at 21:22, Andrew Cooper wrote:
>
> When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
>
> This causes the XSA-259 PoC to fail with:
>
> --- Xen Test Framework ---
> Environment: PV 64bit (Long mode 4 levels)
> XSA-259 PoC
> Error: Unexpected fault 0x80
On 11/03/2025 9:22 pm, Andrew Cooper wrote:
> When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
>
> This causes the XSA-259 PoC to fail with:
>
> --- Xen Test Framework ---
> Environment: PV 64bit (Long mode 4 levels)
> XSA-259 PoC
> Error: Unexpected fault 0x800d0802, #GP[IDT[256
When PV is enabled, entry_int80 needs to be DPL3, not DPL0.
This causes the XSA-259 PoC to fail with:
--- Xen Test Framework ---
Environment: PV 64bit (Long mode 4 levels)
XSA-259 PoC
Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
Test result: ERROR
(Clearly I have a bug in XTF's re
