.init.text is a small section currently located amongst .text.entry
code. Move it above .text.entry.
This has no functional change but makes the code a bit more readable.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Reviewed-by: Jan Beulich
---
CC: Jan Beulich
CC: Andrew Cooper
On 16/08/2022 14:06, Jan Beulich wrote:
> On 16.08.2022 12:16, Jane Malalane wrote:
>> On 05/08/2022 10:24, Jan Beulich wrote:
>>> On 04.08.2022 17:04, Jane Malalane wrote:
>>>> Suggested-by: Andrew Cooper
>>>> Signed-off-by: Jane Malalane
>>>
On 05/08/2022 10:24, Jan Beulich wrote:
> On 04.08.2022 17:04, Jane Malalane wrote:
>> Suggested-by: Andrew Cooper
>> Signed-off-by: Jane Malalane
>
> In the title you say "port", but then you don't say what customization
> you've done beyond t
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Wei Liu
---
xen/include/xen/linkage.h | 260 ++
1 file changed, 260 insertions
These are local symbols and shouldn't be externally visible.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Andrew Cooper
CC: Jan Beulich
CC: "Roger Pau Monné"
CC: Wei Liu
---
xen/arch/x86/x86_64/kexec_reloc.S | 42 +++
Jane Malalane (4):
x86/kexec: Add the '.L_' prefix to is_* and call_* labels
xen: Port linkage.h from kernel code
x86/entry: move .init.text section higher up in the code for
readability
x86: Use linkage.h helpers to add tags to symbols
xen/arch/x86/x86_64/entry.S
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Jan Beulich
CC: Andrew Cooper
CC: "Roger Pau Monné"
CC: Wei Liu
---
xen/arch/x86/x86_64/entry.S | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/xen/arch/x86/x86_64/entry.S
ndrew Cooper
Signed-off-by: Jane Malalane
---
CC: Jan Beulich
CC: Andrew Cooper
CC: "Roger Pau Monné"
CC: Wei Liu
---
xen/arch/x86/x86_64/entry.S | 105 +-
xen/arch/x86/x86_64/kexec_reloc.S | 43 ++--
2 files changed, 86 insertions(+
vector-type callback.
Also register callback_irq at per-vCPU event channel setup to trick
toolstack to think the domain is enlightened.
Suggested-by: "Roger Pau Monné"
Signed-off-by: Jane Malalane
Reviewed-by: Boris Ostrovsky
---
CC: Juergen Gross
CC: Boris Ostrovsky
CC: Thomas Gl
vector-type callback.
Also register callback_irq at per-vCPU event channel setup to trick
toolstack to think the domain is enlightened.
Suggested-by: "Roger Pau Monné"
Signed-off-by: Jane Malalane
---
CC: Juergen Gross
CC: Boris Ostrovsky
CC: Thomas Gleixner
CC: Ingo Molnar
CC
On 27/07/2022 13:32, Julien Grall wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open
> attachments unless you have verified the sender and know the content is
> safe.
>
> Hi Jane,
>
> On 26/07/2022 13:56, Jane Malalane wrote:
>> diff --git a/a
On 27/07/2022 00:31, Boris Ostrovsky wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open
> attachments unless you have verified the sender and know the content is
> safe.
>
> On 7/26/22 8:56 AM, Jane Malalane wrote:
>> +/* Setup per-vCPU vector-typ
On 26/07/2022 13:56, Jane Malalane wrote:
> Implement support for the HVMOP_set_evtchn_upcall_vector hypercall in
> order to set the per-vCPU event channel vector callback on Linux and
> use it in preference of HVM_PARAM_CALLBACK_IRQ.
>
> If the per-VCPU vector setup is success
vector-type callback.
Also register callback_irq at per-vCPU event channel setup to trick
toolstack to think the domain is enlightened.
Suggested-by: "Roger Pau Monné"
Signed-off-by: Jane Malalane
---
CC: Juergen Gross
CC: Boris Ostrovsky
CC: Thomas Gleixner
CC: Ingo Molnar
CC
On 25/07/2022 21:46, Boris Ostrovsky wrote:
>
> On 7/25/22 6:03 AM, Jane Malalane wrote:
>> On 18/07/2022 14:59, Boris Ostrovsky wrote:
>>> On 7/18/22 4:56 AM, Andrew Cooper wrote:
>>>> On 15/07/2022 14:10, Boris Ostrovsky wrote:
>>>>> On 7/15/22 5:
On 18/07/2022 14:59, Boris Ostrovsky wrote:
>
> On 7/18/22 4:56 AM, Andrew Cooper wrote:
>> On 15/07/2022 14:10, Boris Ostrovsky wrote:
>>> On 7/15/22 5:50 AM, Andrew Cooper wrote:
>>>> On 15/07/2022 09:18, Jane Malalane wrote:
>>>>
On 14/07/2022 00:27, Boris Ostrovsky wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open
> attachments unless you have verified the sender and know the content is
> safe.
>
> On 7/11/22 11:22 AM, Jane Malalane wrote:
>> --- a/arch/x86/xen/enlighten_hvm.c
vector-type callback.
Also register callback_irq at per-vCPU event channel setup to trick
toolstack to think the domain is enlightened.
Suggested-by: "Roger Pau Monné"
Signed-off-by: Jane Malalane
---
CC: Juergen Gross
CC: Boris Ostrovsky
CC: Thomas Gleixner
CC: Ingo Molnar
CC
On 11/07/2022 09:26, Jan Beulich wrote:
> On 11.07.2022 10:00, Jane Malalane wrote:
>> On 30/06/2022 07:03, Jan Beulich wrote:
>>> On 30.06.2022 05:25, Tian, Kevin wrote:
>>>>> From: Jane Malalane
>>>>> Sent: Wednesday, June 29, 2022 9:56 PM
>
, based on host capabilities at create
time, are not migrated.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Acked-by: Christian Lindig
Reviewed-by: "Roger Pau Monné"
Reviewed-by: Anthony PERARD
Reviewed-by: Kevin Tian
---
CC: Wei Liu
CC: Anthony PERARD
CC: George Dunl
On 30/06/2022 07:03, Jan Beulich wrote:
> On 30.06.2022 05:25, Tian, Kevin wrote:
>>> From: Jane Malalane
>>> Sent: Wednesday, June 29, 2022 9:56 PM
>>>
>>> Introduce a new per-domain creation x86 specific flag to
>>> select whether hardware assiste
On 08/07/2022 15:33, Christian Lindig wrote:
>
>
> On 8 Jul 2022, at 14:55, Jane Malalane
> mailto:jane.malal...@citrix.com>> wrote:
>
> tools/ocaml/libs/xc/xenctrl.ml | 9 +
> tools/ocaml/libs/xc/xenctrl.mli | 8
> tools/ocaml
n, AMD has one global
'AVIC Enable' control bit, so fine-graining of APIC virtualization
control cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Reviewed-by: "Roger Pau Monné"
Reviewed-by: Jan Beulich
Reviewed-by: Anthony P
On 29/06/2022 15:49, Christian Lindig wrote:
>
>
> On 29 Jun 2022, at 14:55, Jane Malalane
> mailto:jane.malal...@citrix.com>> wrote:
>
> + physinfo = caml_alloc_tuple(11);
> Store_field(physinfo, 0, Val_int(c_physinfo.threads_per_core));
> St
On 29/06/2022 15:26, Jan Beulich wrote:
> On 29.06.2022 15:55, Jane Malalane wrote:
>> Add XEN_SYSCTL_PHYSCAP_X86_ASSISTED_XAPIC and
>> XEN_SYSCTL_PHYSCAP_X86_ASSISTED_X2APIC to report accelerated xAPIC and
>> x2APIC, on x86 hardware. This is so that xAPIC and x2APIC
, based on host capabilities at create
time, are not migrated.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Acked-by: Christian Lindig
Reviewed-by: "Roger Pau Monné"
Reviewed-by: Anthony PERARD
---
CC: Wei Liu
CC: Anthony PERARD
CC: George Dunlap
CC: Nick Rosbrook
CC: Jue
n, AMD has one global
'AVIC Enable' control bit, so fine-graining of APIC virtualization
control cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Reviewed-by: "Roger Pau Monné"
Reviewed-by: Jan Beulich
Reviewed-by: Anthony PERARD
-
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 15 ++
docs/man/xl.conf.5.pod.in | 12 +++
tools/golang
at doesn't care about physical interrupts routed over event
channels can just test for the availability of the hypercall directly
(HVMOP_set_evtchn_upcall_vector) without checking the CPUID bit.
Signed-off-by: Jane Malalane
---
CC: Jan Beulich
CC: Andrew Cooper
CC: "Roger Pau Monn
On 24/05/2022 16:14, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 18.05.2022 15:27, Jane Malalane wrote:
>> --- a/xen/arch/x86/include/asm/domain.h
>
ercall directly
(HVMOP_set_evtchn_upcall_vector) without checking the CPUID bit.
Signed-off-by: Jane Malalane
---
CC: Jan Beulich
CC: Andrew Cooper
CC: "Roger Pau Monné"
CC: Wei Liu
v3:
* Improve commit message and title.
v2:
* Since the naming of the CPUID bit is quite generic, better
On 18/05/2022 10:07, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 11.05.2022 17:14, Jane Malalane wrote:
>> Have is_hvm_pv_evtchn_vcpu() return true fo
On 18/05/2022 10:09, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 13.05.2022 17:39, Roger Pau Monné wrote:
>> On Wed, May 11, 2022 at 04:14:23PM +0100, J
f the hypercall directly
(HVMOP_set_evtchn_upcall_vector) without checking the CPUID bit.
Signed-off-by: Jane Malalane
---
CC: Jan Beulich
CC: Andrew Cooper
CC: "Roger Pau Monné"
CC: Wei Liu
v2:
* Since the naming of the CPUID bit is quite generic, better explain
when it shoul
On 13/05/2022 16:39, Roger Pau Monné wrote:
> On Wed, May 11, 2022 at 04:14:23PM +0100, Jane Malalane wrote:
>> Have is_hvm_pv_evtchn_vcpu() return true for vector callbacks for
>> evtchn delivery set up on a per-vCPU basis via
>> HVMOP_set_evtchn_upcall_vector.
>&g
Have is_hvm_pv_evtchn_vcpu() return true for vector callbacks for
evtchn delivery set up on a per-vCPU basis via
HVMOP_set_evtchn_upcall_vector.
is_hvm_pv_evtchn_vcpu() returning true is a condition for setting up
physical IRQ to event channel mappings.
Signed-off-by: Jane Malalane
---
CC: Jan
, based on host capabilities at create
time, are not migrated.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Reviewed-by: "Roger Pau Monné"
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
C
n, AMD has one global
'AVIC Enable' control bit, so fine-graining of APIC virtualization
control cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
Reviewed-by: "Roger Pau Monné"
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 15 ++
docs/man/xl.conf.5.pod.in | 12 +++
tools/golang
On 06/04/2022 14:44, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 01.04.2022 12:47, Jane Malalane wrote:
>> Introduce a new per-domain creation x8
n, AMD has one global
'AVIC Enable' control bit, so fine-graining of APIC virtualization
control cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 15 ++
docs/man/xl.conf.5.pod.in | 12 +++
tools/golang
config file between hosts that have different support for
hardware assisted x{2}APIC virtualization.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: St
On 23/03/2022 11:30, Roger Pau Monné wrote:
> On Wed, Mar 16, 2022 at 09:13:14AM +0000, Jane Malalane wrote:
>> diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
>> index e1e1fa14e6..77ce0b2121 100644
>> --- a/xen/arch/x86/hvm/vmx/vmcs.c
>> +++ b/
is fine so long
as virtualize_apic_accesses is supported by the CPU.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Li
n, AMD has one global
'AVIC Enable' control bit, so fine-graining of APIC virtualization
control cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 15 ++
docs/man/xl.conf.5.pod.in | 12 +++
tools/golang
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 15 ++
docs/man/xl.conf.5.pod.in | 12 +++
tools/golang
is fine so long
as virtualize_apic_accesses is supported by the CPU.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Li
ntrol cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Volodymyr Babchuk
CC: Bertrand Marqu
On 09/03/2022 10:36, Roger Pau Monné wrote:
> On Tue, Mar 08, 2022 at 05:31:17PM +0000, Jane Malalane wrote:
>> Add XEN_SYSCTL_PHYSCAP_X86_ASSISTED_XAPIC and
>> XEN_SYSCTL_PHYSCAP_X86_ASSISTED_X2APIC to report accelerated xapic
>> and x2apic, on x86 hardware.
>> No
is fine so long
as virtualize_apic_accesses is supported by the CPU.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Li
ntrol cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Volodymyr Babchuk
CC: Bertrand Marqu
On 09/03/2022 16:51, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 09.03.2022 16:56, Jane Malalane wrote:
>> On 08/03/2022 14:41, Jan Beulich wrote:
>&
On 08/03/2022 14:41, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 08.03.2022 15:31, Jane Malalane wrote:
>> On 08/03/2022 12:33, Roger Pau Monné wrote:
is fine so long
as virtualize_apic_accesses is supported by the CPU.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Li
ntrol cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Volodymyr Babchuk
CC: Bertrand Marqu
On 08/03/2022 16:02, Roger Pau Monné wrote:
> On Tue, Mar 08, 2022 at 03:44:18PM +0000, Jane Malalane wrote:
>> On 08/03/2022 11:38, Roger Pau Monné wrote:
>>> On Mon, Mar 07, 2022 at 03:06:09PM +0000, Jane Malalane wrote:
>>>> diff --git a/xen/arch/x86/include/asm/h
On 08/03/2022 16:02, Roger Pau Monné wrote:
> On Tue, Mar 08, 2022 at 03:44:18PM +0000, Jane Malalane wrote:
>> On 08/03/2022 11:38, Roger Pau Monné wrote:
>>> On Mon, Mar 07, 2022 at 03:06:09PM +0000, Jane Malalane wrote:
>>>> diff --git a/xen/arch/x86/include/asm/h
On 08/03/2022 11:38, Roger Pau Monné wrote:
> On Mon, Mar 07, 2022 at 03:06:09PM +0000, Jane Malalane wrote:
>> Introduce a new per-domain creation x86 specific flag to
>> select whether hardware assisted virtualization should be used for
>> x{2}APIC.
>>
>> A pe
On 08/03/2022 12:33, Roger Pau Monné wrote:
> On Tue, Mar 08, 2022 at 01:24:23PM +0100, Jan Beulich wrote:
>> On 08.03.2022 12:38, Roger Pau Monné wrote:
>>> On Mon, Mar 07, 2022 at 03:06:09PM +0000, Jane Malalane wrote:
>>>> @@ -685,13 +687,31 @@ int arch
is fine so long
as virtualize_apic_accesses is supported by the CPU.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Li
that
AVIC support can be introduced in a future patch. Unlike Intel that
has multiple controls for APIC Virtualization, AMD has one global
'AVIC Enable' control bit, so fine-graining of APIC virtualization
control cannot be done on a common interface.
Suggested-by: Andrew Cooper
Signed-o
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in| 19
docs/man/xl.conf.5.pod.in | 12 ++
tools/golang
On 07/03/2022 12:31, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 07.03.2022 13:17, Jane Malalane wrote:
>> On 04/03/2022 08:17, Jan Beulich wrote:
>&
On 04/03/2022 08:17, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 03.03.2022 17:37, Jane Malalane wrote:
>> On 03/03/2022 11:37, Jan Beulich wrote:
>&
On 03/03/2022 11:37, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 02.03.2022 16:00, Jane Malalane wrote:
>> Add XEN_SYSCTL_PHYSCAP_ARCH_
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in| 19
docs/man/xl.conf.5.pod.in | 12 ++
tools/golang
de apic_reg_virt and virtual_intr_delivery.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Volodymyr Babchuk
CC: Bertrand Marquis
CC: Jun Nakajima
ID bit, without virtualize_apic_accesses has no effect on
xAPIC accesses anyway.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Chris
On 28/02/2022 07:32, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 25.02.2022 17:02, Jane Malalane wrote:
>> On 24/02/2022 14:08, Jan Beulich wrote:
>&
On 28/02/2022 07:32, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 25.02.2022 17:02, Jane Malalane wrote:
>> On 24/02/2022 14:08, Jan Beulich wrote:
>&
On 24/02/2022 14:08, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 18.02.2022 18:29, Jane Malalane wrote:
>> Add XEN_SYSCTL_PHYSCAP_ARCH_
On 25/02/2022 13:13, Anthony PERARD wrote:
> On Fri, Feb 18, 2022 at 05:29:43PM +0000, Jane Malalane wrote:
>> diff --git a/tools/include/libxl.h b/tools/include/libxl.h
>> index 333ffad38d..1c83cae711 100644
>> --- a/tools/include/libxl.h
>> +++ b/tools/include/l
On 24/02/2022 17:04, Jan Beulich wrote:
> On 24.02.2022 17:59, Jane Malalane wrote:
>> On 24/02/2022 14:16, Jan Beulich wrote:
>>> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
>>> unless you have verified the sender and know the content is
On 24/02/2022 14:16, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 18.02.2022 18:29, Jane Malalane wrote:
>> --- a/xen/arch/x86/hvm/vmx/vmx.c
>> ++
to struct xen_sysctl_physinfo.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Volodymyr Babchuk
CC: Bertrand Marquis
CC: Jun Nakajima
CC:
long as virtualize_apic_accesses is supported by the CPU.
Suggested-by: Andrew Cooper
Signed-off-by: Jane Malalane
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Lindig
CC:
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 19 +
docs/man/xl.conf.5.pod.in | 12 +++
tools/golang
On 15/02/2022 15:21, Jan Beulich wrote:
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> On 15.02.2022 16:10, Jane Malalane wrote:
>> On 15/02/2022 10:19, Jan Beulich wrote:
>&
On 15/02/2022 10:19, Jan Beulich wrote:
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> On 15.02.2022 11:14, Jane Malalane wrote:
>> On 15/02/2022 07:09, Jan Beulich wrote:
>&
On 15/02/2022 07:09, Jan Beulich wrote:
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> On 14.02.2022 18:09, Jane Malalane wrote:
>> On 14/02/2022 13:18, Jan Beulich wrote:
>&
On 14/02/2022 13:18, Jan Beulich wrote:
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> On 14.02.2022 14:11, Jane Malalane wrote:
>> On 11/02/2022 11:46, Jan Beulich wrote:
>&
On 11/02/2022 11:46, Jan Beulich wrote:
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> On 11.02.2022 12:29, Roger Pau Monné wrote:
>> On Fri, Feb 11, 2022 at 10:06:48AM +0000, J
On 10/02/2022 10:03, Roger Pau Monné wrote:
> On Mon, Feb 07, 2022 at 06:21:00PM +0000, Jane Malalane wrote:
>> diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
>> index 7ab15e07a0..4060aef1bd 100644
>> --- a/xen/arch/x86/hvm/vmx/vmcs.c
>> +++ b/
On 10/02/2022 10:09, Roger Pau Monné wrote:
> On Mon, Feb 07, 2022 at 06:21:01PM +0000, Jane Malalane wrote:
>> Introduce a new per-domain creation x86 specific flag to
>> select whether hardware assisted virtualization should be used for
>> x{2}APIC.
>>
>> A pe
On 09/02/2022 11:37, Jan Beulich wrote:
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> unless you have verified the sender and know the content is safe.
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> On 09.02.2022 11:31, Jane Malalane wrote:
>> This is not a bug. The xen cmdline can r
On 09/02/2022 13:48, Anthony PERARD wrote:
> On Wed, Feb 09, 2022 at 12:26:05PM +0000, Jane Malalane wrote:
>> On 08/02/2022 15:26, Roger Pau Monné wrote:
>>> On Mon, Feb 07, 2022 at 06:21:00PM +0000, Jane Malalane wrote:
>>>> diff --git a/tools/golang/xenlight/typ
On 08/02/2022 15:26, Roger Pau Monné wrote:
> On Mon, Feb 07, 2022 at 06:21:00PM +0000, Jane Malalane wrote:
>> Add XEN_SYSCTL_PHYSCAP_ARCH_ASSISTED_xapic and
>> XEN_SYSCTL_PHYSCAP_ARCH_ASSISTED_x2apic to report accelerated xapic
>> and x2apic, on x86 hardware.
>> No
On 08/02/2022 16:17, Roger Pau Monné wrote:
> On Mon, Feb 07, 2022 at 06:21:01PM +0000, Jane Malalane wrote:
>> Introduce a new per-domain creation x86 specific flag to
>> select whether hardware assisted virtualization should be used for
>> x{2}APIC.
>>
>> A pe
On 09/02/2022 10:31, Jane Malalane wrote:
> This is not a bug. The xen cmdline can request both a NUMA restriction
> and a vcpu count restriction for Dom0. The node restriction wil always
> be respected which might mean either using dom0_max_vcpus <
> opt_dom0_max_vcpus_max or u
ere dom0_max_vcpus gets capped at the maximum number of
pCPUs for the number of nodes chosen, it can be useful particularly
for debugging to print a message in the serial log.
Suggested-by: Edwin Torok
Signed-off-by: Jane Malalane
---
CC: Jan Beulich
CC: Andrew Cooper
CC: "Roger Pau Monné"
On 08/02/2022 13:52, Jan Beulich wrote:
> [CAUTION - EXTERNAL EMAIL] DO NOT reply, click links, or open attachments
> unless you have verified the sender and know the content is safe.
>
> On 08.02.2022 14:27, Jane Malalane wrote:
>> On 31/01/2022 12:05, Jan Beulich wrote:
>&
On 31/01/2022 12:05, Jan Beulich wrote:
> On 27.01.2022 17:01, Jane Malalane wrote:
>> Introduce a new per-domain creation x86 specific flag to
>> select whether hardware assisted virtualization should be used for
>> x{2}APIC.
>>
>> A per-domain option is added t
-by: Jane Malalane
Suggested-by: Andrew Cooper
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Christian Lindig
CC: David Scott
CC: Volodymyr Babchuk
CC: "Roger Pau Monné"
v2
to struct xen_sysctl_physinfo.
Signed-off-by: Jane Malalane
Suggested-by: Andrew Cooper
---
CC: Wei Liu
CC: Anthony PERARD
CC: Juergen Gross
CC: Andrew Cooper
CC: George Dunlap
CC: Jan Beulich
CC: Julien Grall
CC: Stefano Stabellini
CC: Volodymyr Babchuk
CC: Bertrand Marquis
CC: Jun Nakajima
CC:
Jane Malalane (2):
xen+tools: Report Interrupt Controller Virtualization capabilities on
x86
x86/xen: Allow per-domain usage of hardware virtualized APIC
docs/man/xl.cfg.5.pod.in | 10 +
docs/man/xl.conf.5.pod.in | 12 ++
tools/golang/xenlight
On 01/02/2022 10:02, Roger Pau Monné wrote:
> On Thu, Jan 27, 2022 at 04:01:33PM +0000, Jane Malalane wrote:
>> Introduce a new per-domain creation x86 specific flag to
>> select whether hardware assisted virtualization should be used for
>> x{2}APIC.
>>
>> A pe
Hi,
On 31/01/2022 12:05, Jan Beulich wrote:
> On 27.01.2022 17:01, Jane Malalane wrote:
>> Introduce a new per-domain creation x86 specific flag to
>> select whether hardware assisted virtualization should be used for
>> x{2}APIC.
>>
>> A per-domain option is a
On 28/01/2022 17:04, Anthony PERARD wrote:
> On Thu, Jan 27, 2022 at 04:01:32PM +0000, Jane Malalane wrote:
>> Add XEN_SYSCTL_PHYSCAP_ARCH_ASSISTED_xapic and
>> XEN_SYSCTL_PHYSCAP_ARCH_ASSISTED_x2apic to report accelerated xapic
>> and x2apic, on x86 hardware.
>> No
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