On 04/01/18 21:21, Andrew Cooper wrote:
> This work was developed as an SP3 mitigation, but shelved when it became clear
> that it wasn't viable to get done in the timeframe.
>
> To protect against SP3 attacks, most mappings needs to be flushed while in
> user context. However, to protect against
flight 117613 xen-4.10-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117613/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-xtf-amd64-amd64-5 broken
test-amd64-amd64-xl-qemut-win10-i386
flight 117607 xen-4.9-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117607/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf broken
build-armhf 4 host-i
Greeting,
I am trying to modify Xen 4.8 to have it print out the opcode as well as
some registers of an HVM domU as it runs. I tried to modify
xen/arch/x86/hvm/emulate.c 's hvmemul_insn_fetch to output the content in
hvmemul_ctxt->insn_buf with printk. In hvmemul_insn_fetch, it seems that a
lot of
flight 117612 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117612/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-qemuu-rhel6hvm-intel broken
test-amd64-amd64-xl-qemuu-ws16-amd64 1
On 12/26/2017 10:22 PM, David Miller wrote:
> From: Joao Martins
> Date: Thu, 21 Dec 2017 17:24:28 +
>
>> Commit eb1723a29b9a ("xen-netback: refactor guest rx") refactored Rx
>> handling and as a result decreased max grant copy ops from 4352 to 64.
>> Before this commit it would drain the rx_
flight 117609 linux-3.18 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117609/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-libvirt broken
test-amd64-i386-xl-qem
flight 117597 linux-next real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117597/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-xl-qemuu-win10-i386 broken
test-amd64-amd64-xl-credit2
flight 117601 xen-4.7-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117601/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-libvirt-xsm broken
test-amd64-amd64-
On 01/04/2018 07:26 AM, Paul Durrant wrote:
>> -Original Message-
>> From: Xen-devel [mailto:xen-devel-boun...@lists.xenproject.org] On Behalf
>> Of Anthony PERARD
>> Sent: 04 January 2018 12:52
>> To: Kevin Stange
>> Cc: George Dunlap ; xen-
>> de...@lists.xenproject.org
>> Subject: Re: [
On 01/04/2018 06:52 AM, Anthony PERARD wrote:
> On Wed, Jan 03, 2018 at 05:10:54PM -0600, Kevin Stange wrote:
>> On 01/03/2018 11:57 AM, Anthony PERARD wrote:
>>> On Wed, Dec 20, 2017 at 11:40:03AM -0600, Kevin Stange wrote:
Hi,
I've been working on transitioning a number of Windows
The ACPI idle driver uses an IPI to retrieve cpuid_ecx(5). This is
problematic because it uses a stack pointer, but also wasteful at runtime.
Introduce X86_FEATURE_XEN_MONITOR as a synthetic feature bit meaning MONITOR
&& EXTENSIONS && INTERRUPT_BREAK, and calculate it when a cpu comes up rather
When booting Xen via UEFI the Xen config file can contain multiple sections
each describing different boot options. It is currently only possible to choose
which section to boot with if the buffer contains a string. UEFI provides a
different standard to pass optional arguments to an application, an
do_mca() makes several IPI with huge parameter blocks. All operations are
control-plane, and for debugging/development purposes, so restrict them to
being serialised. This allows the hypercall parameter block to safely be
static.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/cpu/mcheck/mce.c |
The loading of IDTR is moved out of load_system_tables() and into
early_switch_to_idle().
One complication for the BSP is that IST references still need to remain
uninitalised until reinit_bsp_stack(). Therefore, early_switch_to_idle() is
extended to take a bsp boolean.
For VT-x guests, HOST_IDT
Ensure the pagetables we are switching to have the correct percpu mappings in
them. The _PGC_inuse_pgtable check ensures that the pagetables we edit aren't
in use elsewhere.
One complication however is context switching between two vcpus which both
require shadowing. See the code comment for det
Windows is the only OS which pages out kernel datastructures, so chances are
good that this is a vestigial remnant of the PV Windows XP experiment.
Furthermore the implementation is incomplete; it only functions for a present
=> not-present transition, rather than a present => read/write transition
... and always zero the LDT for HVM contexts. This causes erroneous execution
which manages to reference the LDT fail with a straight #GP fault, rather than
possibly finding a stale loaded LDT and wandering the #PF handler.
Future changes will cause the loading of LDT to be lazy, at which point
l
The existing translation area claims to be 2 frames and a guard page, but is
actually 4 frames with no guard page at all.
Allocate 2 frames in the percpu area, which actually has unmapped frames on
either side.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/smpboot.c | 27 +
There are some addresses which are not safe to pass as IPI parameters, as they
are not mapped on other cpus (or worse, mapped to something else). Introduce
an arch-specific audit hook which is used to check the parameter.
ARM has this stubbed to true, whereas x86 now excluses pointers in the PERC
This allows {setup,free}_compat_arg_xlat() to be dropped.
Changing COMPAT_ARG_XLAT_VIRT_BASE to avoid referencing current has a fairly
large impact on code size, as it is hidden underneath the
copy_{to,from}_guest() logic.
The net bloat-o-meter report for this change is:
add/remove: 0/2 grow/s
This involves allocating a total of 5 frames, which don't have to be an
order-3 allocation, and unconditionally has guard pages in place for a primary
stack overflow.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/smpboot.c | 27 ++-
xen/include/asm-x86/config.h | 2
Construction of the TSS is the final action remaining in load_system_tables(),
and is lifted to early_switch_to_idle(). As a single global TSS is in use,
the per_cpu init_tss variable is dropped.
The setting of HOST_TR_BASE is now a constant, so moves to construct_vmcs().
This means that vmx_set_
This change also introduces _alter_percpu_mappings(), a helper for creating
and modifying percpu mappings. The code will be extended with extra actions
in later patches.
The existing IDT heap allocation and idt_tables[] array are kept, although the
allocation logic is simplified as an IDT is stri
A number of hypercalls and softirq tasks pass small stack buffers via IPI.
These operate sequentially on a single CPU, so introduce a shared PER_CPU
buffer for use. Access to the buffer is via get_smp_ipi_buf(), which performs
a range check at compile time.
Signed-off-by: Andrew Cooper
---
xen/
The PERCPU linear range lives in slot 257, and all later slots slide along to
make room. The size of the directmap is reduced by one slot temporarily.
Later changes will remove the PERDOMAIN slot, at which point the latter slots
will slide back to fill the hole, and end up where they are now.
Si
Like the mapcache region, we need an L1e which is modifiable in the context
switch code.
The Xen-reserved GDT frames are proactively mapped for the benefit of future
changes to the AP boot path.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/smpboot.c | 21 +
xen/includ
This is in preparation for the APs to switch to their percpu stack before
entering C.
This requires splitting the BSP and AP paths in __high_start(), and for
do_boot_cpu() to pass the appropriate pagetables. The result is that
early_switch_to_idle() no longer needs to switch pagetables, but the s
There are two reasons:
1) To stop using the per-domain range for the mapcache
2) To make map_domain_page() safe to use during context switches
The new implementation is entirely percpu and rather more simple. See the
comment at the top of domain_page.c for a description of the algorithm.
A sid
This will be used to remove the mapcache override/current vcpu mechanism when
reworking map_domain_page() to be safe in the middle of context switches.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/mm.c| 11 +++
xen/arch/x86/setup.c | 2 ++
xen/common/efi/runtime.c | 3 +++
Keyhandlers for the following:
'1' - Walk idle_pg_table[]
'2' - Walk each percpu_mappings
'3' - Dump PT shadow stats
---
xen/arch/x86/hvm/save.c| 4 -
xen/arch/x86/mm/p2m-ept.c | 5 +-
xen/arch/x86/pv/pt-shadow.c| 19
xen/arch/x86/traps.c | 1
See the code comments for reasoning and the algorithm description.
This is a very simplistic algorithm, which comes with a substantial
performance overhead. The algorithm will be improved in a later patch, once
more infrastructure is in place.
Some of the code (particularly in pt_maybe_shadow())
Future changes will alter the conditions under which we expect to take faults.
One adjustment however is to exclude the use of this fixup path for non-PV
guests. Well-formed code shouldn't reference the LDT while in HVM vcpu
context, but currently on a context switch from PV to HVM context, there
The percpu fixmap range was introduced to allow opencoding of
map_domain_page() in the middle of a context switch.
The new implementation of map_domain_page() is safe to use in a context
switch, so drop the percpu fixmap infrastructure.
This removes the temporary build-time restriction on NR_CPUS
With all CPUs using the same virtual stack mapping, the TSS rsp0/ist[0..2]
values are compile-time constant. Therefore, we can use a single read-only
TSS for the whole system.
To faciliate this, a new .rodata.page_aligned section needs introducing.
Signed-off-by: Andrew Cooper
---
xen/arch/x86
The mapcache infrastructure needs some linear address space with which to make
temporary mappings.
_alter_percpu_mappings() is updated to support allocating an L1t, and
cpu_smpboot_alloc_common() is updated to allocate an L1t for mapcache
purposes, and map the L1t into linear address space so it c
With the mapcache, xlat and GDT/LDT moved over to the PERCPU mappings, there
are no remaining users of the PERDOMAIN mappings. Drop the whole PERDOMAIN
infrastructure, and remove the PERDOMAIN slot in the virtual address layout.
Slide each of the subsequent slots back by one, and extend the direc
This is unfortunately quite invasive, because of the impact on the context
switch path.
PV vcpus gain an array of ldt and gdt ptes (replacing gdt_frames[]), which map
the frames loaded by HYPERCALL_set_gdt, or faulted in for the LDT. Each
present PTE here which isn't a read-only mapping of zero_p
Signed-off-by: Andrew Cooper
---
v3:
* Switch to using a single structure per cpu, rather than multiple fields.
---
xen/arch/x86/pv/Makefile | 1 +
xen/arch/x86/pv/pt-shadow.c| 86 ++
xen/arch/x86/smpboot.c | 7
xen/include
This is required to implement an opencoded version of map_domain_page() during
context switch. It must fit within l1_fixmap[], which imposes an upper limit
on the NR_CPUS.
The limit is currently 509, but will be lifted after later changes.
Signed-off-by: Andrew Cooper
---
xen/include/asm-x86/f
TSS and IST setings are only required for safety when running userspace code.
Until we start executing dom0, the boot path is perfectly capable of handling
exceptions and interrupts without a loaded TSS.
Deferring the TSS setup is necessary to facilitiate moving the BSP onto a
percpu stack, which
Pagetables are allocated and freed along with the other smp datastructures,
and the root of the pagetables is stored in the percpu_mappings variable.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/smpboot.c | 91 ++
xen/include/asm-x86/page.h | 1 +
This improves the shadowing performance substantially. In particular, system
calls for 64bit PV guests (which switch between the user and kernel
pagetables) no longer suffer a 4K copy hit in both directions.
See the code comments for reasoning and the algorithm description.
Signed-off-by: Andrew
Signed-off-by: Andrew Cooper
---
xen/arch/x86/mm.c| 19 ++-
xen/arch/x86/setup.c | 1 +
xen/include/asm-x86/mm.h | 6 +-
3 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 375565f..d6f88ca 100644
--- a/xen/
With percpu stacks, it will not be safe to pass stack pointers. The logic in
machine_restart(), time_calibration() and set_mtrr() is singleton, so switch
to using static variables.
The set_mtrr_data is protected under the mtrr_mutex, which requires
mtrr_ap_init() and mtrr_aps_sync_end() to hold t
Signed-off-by: Andrew Cooper
Reviewed-by: Jan Beulich
---
xen/arch/x86/pv/mm.h | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/pv/mm.h b/xen/arch/x86/pv/mm.h
index 7502d53..a10b09a 100644
--- a/xen/arch/x86/pv/mm.h
+++ b/xen/arch/x86/pv/mm.h
This is very easy for the APs. __high_start() is modified to switch stacks
before entering C. The BSP however is more complicated, and needs to stay on
cpu0_stack[] until setup is complete.
The end of __start_xen() is modified to copy the top-of-stack data to the
percpu stack immediately before
Introduce cpu_smpboot_alloc_common(), for state shared between
cpu_smpboot_alloc() and cpu_smpboot_bsp().
A necessary requirement now is that cpu_smpboot_nfb must be called between
allocating the percpu areas, and calling into the scheduler logic.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/s
Xen will need to track which %cr3 it is running on. Propagate a
tlb_maintenance parameter down into write_ptbase(), so toggle_guest_mode() can
retain its optimisation of not flushing global mappings and not ticking the
TLB clock.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/mm.c
... and assert that it isn't changing under our feet. early_switch_to_idle()
is adjusted to set the shadow initially, when switching off idle_pg_table[].
EFI Runtime Service handling happens synchronously and under lock, so doesn't
interact with this path.
Signed-off-by: Andrew Cooper
---
xen/
This work was developed as an SP3 mitigation, but shelved when it became clear
that it wasn't viable to get done in the timeframe.
To protect against SP3 attacks, most mappings needs to be flushed while in
user context. However, to protect against all cross-VM attacks, it is
necessary to ensure t
idle_pg_table[] needs all slots populated before it is copied to create the
vcpu idle pagetables. One missing slot is for MMCFG, which is now allocated
early.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/setup.c | 4 ++--
xen/arch/x86/x86_64/mm.c | 15 +++
2 files changed, 17
Move the existing stub allocation into the new function, and call it before
initialising the idle domain; eventually it will allocate the pagetables for
the idle vcpu to use.
Signed-off-by: Andrew Cooper
Reviewed-by: Jan Beulich
---
xen/arch/x86/setup.c | 6 ++
xen/arch/x86/smpboot.c
All alteration of IST settings (other than the crash path) happen in an
identical triple. Introduce helpers to keep the triple in sync, and reduce
the risk of opencoded mistakes.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/cpu/common.c | 4 +---
xen/arch/x86/hvm/svm/svm.c | 8 ++-
and move it into pv/descriptor-tables.c beside its GDT counterpart. Reduce
the !in_irq() check from a BUG_ON() to ASSERT().
Signed-off-by: Andrew Cooper
---
v2:
* New
---
xen/arch/x86/mm.c | 51 -
xen/arch/x86/pv/descriptor-tables.c | 42 ++
Introduce early_switch_to_idle() to replace the opencoded switching to idle
context in the BSP and AP boot paths, and extend it to switch away from
idle_pg_table[] as well.
Signed-off-by: Andrew Cooper
Reviewed-by: Jan Beulich
---
xen/arch/x86/domain.c| 4 +++-
xen/arch/x86/domain_page
DMA-ing to the stack is generally considered bad practice. In this case, if a
timeout occurs because of a sluggish device which is processing the request,
the completion notification will corrupt the stack of a subsequent deeper call
tree.
Place the poll_slot in a percpu area and DMA to that inst
001000-0x7fff]
>> [0.00] On node 0 totalpages: 524181
>> [0.00] DMA zone: 64 pages used for memmap
>> [0.00] DMA zone: 21 pages reserved
>> [0.00] DMA zone: 3989 pages, LIFO batch:0
>> [0.00] DMA32 zone: 8128
On Thu, Jan 04, 2018 at 12:15:44AM +, Andrew Cooper wrote:
> Contemporary processors are gaining Indirect Branch Controls via microcode
> updates. Intel are introducing one bit to indicate IBRS and IBPB support, and
> a second bit for STIBP. AMD are introducing IPBP only, so enumerate it with
flight 117595 linux-4.9 real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117595/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-i386-pvgrub broken
test-amd64-i386-xl
On Thu, Jan 4, 2018 at 9:45 AM, Jan Beulich wrote:
On 04.01.18 at 17:35, wrote:
>> On Thu, Jan 4, 2018 at 9:25 AM, Jan Beulich wrote:
>> On 04.01.18 at 17:16, wrote:
On Thu, Jan 4, 2018 at 8:00 AM, Jan Beulich wrote:
On 04.01.18 at 15:39, wrote:
>> On Thu, Jan 4, 20
>>> On 04.01.18 at 17:35, wrote:
> On Thu, Jan 4, 2018 at 9:25 AM, Jan Beulich wrote:
> On 04.01.18 at 17:16, wrote:
>>> On Thu, Jan 4, 2018 at 8:00 AM, Jan Beulich wrote:
>>> On 04.01.18 at 15:39, wrote:
> On Thu, Jan 4, 2018 at 3:43 AM, Jan Beulich wrote:
>> Just looking at
On Thu, Jan 4, 2018 at 9:25 AM, Jan Beulich wrote:
On 04.01.18 at 17:16, wrote:
>> On Thu, Jan 4, 2018 at 8:00 AM, Jan Beulich wrote:
>> On 04.01.18 at 15:39, wrote:
On Thu, Jan 4, 2018 at 3:43 AM, Jan Beulich wrote:
> Just looking at the low bit of the first
> byte befor
>>> On 04.01.18 at 17:16, wrote:
> On Thu, Jan 4, 2018 at 8:00 AM, Jan Beulich wrote:
> On 04.01.18 at 15:39, wrote:
>>> On Thu, Jan 4, 2018 at 3:43 AM, Jan Beulich wrote:
Just looking at the low bit of the first
byte before assuming this could be a load option structure,
how
On Thu, Jan 4, 2018 at 8:00 AM, Jan Beulich wrote:
On 04.01.18 at 15:39, wrote:
>> On Thu, Jan 4, 2018 at 3:43 AM, Jan Beulich wrote:
>>> Just looking at the low bit of the first
>>> byte before assuming this could be a load option structure,
>>> however, is too weak a check for my taste.
>
flight 117634 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/117634/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
>>> On 04.01.18 at 15:39, wrote:
> On Thu, Jan 4, 2018 at 3:43 AM, Jan Beulich wrote:
>> Just looking at the low bit of the first
>> byte before assuming this could be a load option structure,
>> however, is too weak a check for my taste.
>
> There is more done in this patch then just checking t
On Thu, Jan 4, 2018 at 3:43 AM, Jan Beulich wrote:
On 03.01.18 at 17:53, wrote:
>> On Wed, Jan 3, 2018 at 9:36 AM, Jan Beulich wrote:
>> On 03.01.18 at 17:04, wrote:
On Wed, Jan 3, 2018 at 4:20 AM, Jan Beulich wrote:
On 02.01.18 at 16:56, wrote:
>> +if ( elo
>>> On 04.01.18 at 14:05, wrote:
> PVH only requires PHYS32_ENTRY to be set. Return immediately if that's
> the case.
So I guess the bug(?) being fixed is that so far loader or guest_os,
and xen_ver settings are also required. However, you fail to mention
_why_ you think they're not required. I c
>>> On 04.01.18 at 14:05, wrote:
> @@ -518,7 +522,7 @@ static void early_init_amd(struct cpuinfo_x86 *c)
> if (c == &boot_cpu_data)
> amd_init_levelling();
>
> - amd_ctxt_switch_levelling(NULL);
> + ctxt_switch_levelling(NULL);
> }
I don't really understand this cha
>>> On 04.01.18 at 14:05, wrote:
> --- a/xen/arch/x86/msr.c
> +++ b/xen/arch/x86/msr.c
> @@ -39,7 +39,8 @@ static void __init calculate_hvm_max_policy(void)
> return;
>
> /* 0x00ce MSR_INTEL_PLATFORM_INFO */
> -if ( boot_cpu_data.x86_vendor == X86_VENDOR_INTEL )
> +if
flight 73880 distros-debian-wheezy real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/73880/
Failures and problems with tests :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-armhf-pvopsbroken
build-i38
Reserve a hole in a rangeset.
Signed-off-by: Roger Pau Monne
Signed-off-by: Wei Liu
---
xen/common/rangeset.c | 51 ++
xen/include/xen/rangeset.h | 4
2 files changed, 55 insertions(+)
diff --git a/xen/common/rangeset.c b/xen/common/ranges
From: Roger Pau Monne
So that the guest is not able to deplete the memory pool of the shim
itself by trying to balloon up.
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/pv/shim.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/xen/arch/x86/pv/shim.c b/xen/arch/x86/pv/shim.c
index c
From: Sergey Dyasli
Signed-off-by: Sergey Dyasli
Signed-off-by: Andrew Cooper
---
xen/drivers/char/Makefile | 1 +
xen/drivers/char/xen_pv_console.c | 198 ++
xen/include/asm-x86/fixmap.h | 1 +
xen/include/asm-x86/guest/hypercall.h
From: Roger Pau Monne
When running a 32bit kernel as Dom0 on a 64bit hypervisor the
hypervisor will try to shrink the hypervisor hole to the minimum
needed, and thus requires the Dom0 to use XENMEM_machphys_mapping in
order to fetch the position of the start of the hypervisor virtual
mappings.
D
From: Andrew Cooper
TODO: Replace somehow (bootstrap_map() ?)
Signed-off-by: Andrew Cooper
---
xen/arch/x86/boot/x86_64.S | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index cf47e019f5..42636cf334 100644
--- a/xen/
From: Ian Jackson
When running pv-in-pvh, we are going to want to pass this function an
exciting config which is a mixture of the user's main domain
configuration, and some PVH configuration which we make up.
To this end, have libxl__build_hvm take, and honour, a separate
parameter for config->b
From: Andrew Cooper
This is necessary to prevent the PV guest seeing HVM Xen leaves via native
cpuid.
Signed-off-by: Andrew Cooper
---
xen/arch/x86/cpu/common.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index a1
From: Andrew Cooper
Signed-off-by: Andrew Cooper
---
tools/ocaml/libs/xc/xenctrl.ml | 29 +
tools/ocaml/libs/xc/xenctrl.mli | 28
tools/ocaml/libs/xc/xenctrl_stubs.c | 26 --
3 files changed, 81 insertions
From: Roger Pau Monne
Avoid scheduling vCPUs that are blocked, there's no point in assigning
them to a pCPU because they are not going to run anyway.
Since blocked vCPUs are not assigned to pCPUs after this change, force
a rescheduling when a vCPU is brought up if it's on the waitqueue.
Also whe
From: Andrew Cooper
When the xen binary is loaded by libelf (in the future) we rely on the
elf loader to load the binary accordingly.
Signed-off-by: Andrew Cooper
Signed-off-by: Wei Liu
---
xen/arch/x86/xen.lds.S | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
d
From: Roger Pau Monne
All guest shutdown operations are forwarded to L0, so the only native
calls to machine_restart happen from crash related paths inside the
hypervisor, hence switch the reboot code to instead issue a crash
shutdown.
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/shutdown.c
From: Andrew Cooper
Signed-off-by: Andrew Cooper
---
xen/arch/x86/Kconfig | 17 +
1 file changed, 17 insertions(+)
diff --git a/xen/arch/x86/Kconfig b/xen/arch/x86/Kconfig
index 7c4582922f..c0b0bcdcb3 100644
--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -117,6 +117,2
From: Ian Jackson
We shouldn't allocate when it's both unnecessary, and not in
accordance with the thing we're copying.
One effect is to make a copied libxl__domain_build_info more like the
original, which is going to be helpful for the pv shim mode.
Signed-off-by: Ian Jackson
---
tools/libxl
From: Andrew Cooper
This allows toolstack software to distinguish HVM from PVH guests.
Signed-off-by: Andrew Cooper
---
tools/libxc/include/xenctrl.h | 1 +
tools/libxc/xc_domain.c | 1 +
xen/arch/x86/domctl.c | 2 ++
xen/include/public/domctl.h | 1 +
4 files changed, 5 insert
From: Andrew Cooper
This specifies whether to use Xen specific console output. There are
two variants: one is the hypervisor console, the other is the magic
debug port 0xe9.
Signed-off-by: Andrew Cooper
Signed-off-by: Wei Liu
---
xen/drivers/char/console.c| 33
It is a variant of TSC clock source.
Signed-off-by: Wei Liu
Signed-off-by: Andrew Cooper
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/time.c | 94 +
1 file changed, 94 insertions(+)
diff --git a/xen/arch/x86/time.c b/xen/arch/x86/time.c
i
From: Roger Pau Monne
Signed-off-by: Roger Pau Monné
Signed-off-by: Anthony Liguori
Signed-off-by: Andrew Cooper
---
xen/arch/x86/pv/shim.c| 174 ++
xen/common/compat/grant_table.c | 5 +
xen/common/grant_table.c | 10 ++
x
From: Roger Pau Monne
So that the limit of XEN_LEGACY_MAX_VCPUS can be lifted.
Signed-off-by: Roger Pau Monné
---
Should be moved earlier maybe?
---
xen/arch/x86/guest/xen.c | 61 +--
xen/arch/x86/time.c | 11 ++-
xen/include/a
From: Andrew Cooper
Signed-off-by: Andrew Cooper
---
docs/misc/xen-command-line.markdown | 11 ++
xen/arch/x86/Kconfig| 22 +++
xen/arch/x86/pv/Makefile| 1 +
xen/arch/x86/pv/shim.c | 39 ++
xen/in
From: Roger Pau Monne
Note that the unmask and the virq operations are handled by the shim
itself, and that FIFO event channels are not exposed to the guest.
Signed-off-by: Anthony Liguori
Signed-off-by: Roger Pau Monné
Signed-off-by: Sergey Dyasli
---
xen/arch/x86/guest/xen.c | 25
From: Roger Pau Monne
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/dom0_build.c | 4
1 file changed, 4 insertions(+)
diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c
index bf992fef6d..357fd87f39 100644
--- a/xen/arch/x86/dom0_build.c
+++ b/xen/arch/x86/dom0_build.c
@@
From: Andrew Cooper
Link a minimum set of files to build the shim. The linkfarm rune can
handle creation and deletion of files.
We can do better by properly generate the dependency from the list of
files but that's an improvement for later.
Signed-off-by: Andrew Cooper
Signed-off-by: Wei Liu
Signed-off-by: Wei Liu
Signed-off-by: Andrew Cooper
---
xen/arch/x86/guest/xen.c| 24
xen/arch/x86/setup.c| 3 +++
xen/include/asm-x86/fixmap.h| 3 +++
xen/include/asm-x86/guest/xen.h | 10 ++
4 files changed, 40 insertions(+)
diff --gi
From: Andrew Cooper
Signed-off-by: Andrew Cooper
---
xen/arch/x86/guest/Makefile | 2 ++
xen/arch/x86/guest/xen.c| 75 +
xen/arch/x86/setup.c| 2 ++
xen/include/asm-x86/guest.h | 1 +
xen/include/asm-x86/guest/xen.h | 47 +++
From: Roger Pau Monne
If available.
Signed-off-by: Roger Pau Monné
---
To be moved before "x86/guest: enable event channels upcalls"
---
xen/arch/x86/guest/xen.c | 24 +---
xen/arch/x86/time.c | 4 +++-
2 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/x
From: Ian Jackson
** NOTE: This patch does not currently work! **
** NOTE: I intend to change the config names from "pvhshim" to "pvshim" **
This is API-compatible because old callers are supposed to call
libxl_*_init to initialise the struct; and the updated function clears
these members.
It
Signed-off-by: Wei Liu
Signed-off-by: Andrew Cooper
---
xen/arch/x86/Makefile| 1 +
xen/arch/x86/boot/head.S | 40 +++-
xen/arch/x86/boot/x86_64.S | 2 +-
xen/arch/x86/guest/Makefile | 1 +
xen/arch/x86/guest/pvh-boot.c| 119 +
From: Ian Jackson
And move the debugging options from the default config into a doc
comment in libxl_types.idl.
Signed-off-by: Ian Jackson
---
tools/libxl/libxl.h | 2 +-
tools/libxl/libxl_create.c | 5 -
tools/libxl/libxl_internal.h | 2 +-
tools/libxl/libxl_types.idl | 1 +
4
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