ot;donated time slots" way?
>
> Yes
>
>
>> > > 1) and 2) are particularly important. If we had them, we would not
>> > > need
>> > > el0 apps. I believe stubdoms would be as fast as el0 apps too.
>> >
>> > CC'ing George a
Hi Julien,
On 21 April 2017 at 18:49, Julien Grall wrote:
>
>
> On 21/04/17 15:42, Andrii Anisov wrote:
>>
>> Hello,
>
>
> Hi,
>
>> On 20.04.17 23:20, Volodymyr Babchuk wrote:
>>>
>>> Hi Stefano,
>>>
>>> On 12 April
Hi Julien,
On 21 April 2017 at 18:57, Julien Grall wrote:
> Hello Volodymyr,
>
> On 20/04/17 21:20, Volodymyr Babchuk wrote:
>>
>> On 12 April 2017 at 22:17, Stefano Stabellini
>> wrote:
>>>
>>> On Wed, 12 Apr 2017, Dario Faggioli wrote:
>>
Julien,
On 21 April 2017 at 19:47, Julien Grall wrote:
> On 21/04/17 17:16, Volodymyr Babchuk wrote:
>>
>> Hi Julien,
>
>
> Hi Volodymyr,
>
>
>> On 21 April 2017 at 18:57, Julien Grall wrote:
>>>
>>> Hello Volodymyr,
>>>
>>>
Hi Julien,
On 21 April 2017 at 20:38, Julien Grall wrote:
> Hi Volodymyr,
>
> On 21/04/17 18:04, Volodymyr Babchuk wrote:
>>
>> On 21 April 2017 at 19:47, Julien Grall wrote:
>>>
>>> On 21/04/17 17:16, Volodymyr Babchuk wrote:
>>>>
visor). I just wanted to to consider idea of doing this in TEE.
But you are right, XEN can remove pages in any time, so we need to pin
them.
> your guest and also potential bounce buffer if the guest buffer span across
> multiple pages.
That should be done on TEE driver side. Actually, I'
g on the number of LRs used by a domain.
Excuse me, what is LR in this context?
You can take a look at my context switch routines at [2].
[1] http://marc.info/?l=xen-devel&m=149088856116797&w=2
[2] https://github.com/lorc/xen/blob/el0_app/xen/arch/arm/domain.c#L257
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Hi Julien,
On 25 April 2017 at 14:43, Julien Grall wrote:
>> We will also need another type of application: one which is
>> periodically called by XEN itself, not actually servicing any domain
>> request. This is needed for a
>> coprocessor sharing framework scheduler implementati
to_partial - 5.7%
gicv2_hcr_status - 4.6%
per-source-file statistics:
spinlock.c - 22%
entry.S - 15%
arm/domain.c - 11.6%
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t. The use case is
>> a small initramfs.
>>
>> Potential task: Keep Xen updated on buildroot. Anastasios could help on
>> that.
>>
>> Stefano: Xen is compiling fine with Yocto.
>>
>> ACTION: Stefano to write a wiki p
why context switch is heavy on ARM.
>
> In the case of ARM, when entering to the hypervisor, we only save the bare
> minimum (all non-banked registers + registers useful for handling guest
> request), and left the rest untouched.
>
> Our save/restore functions are quite big because it
o know that it is possible.
> Lastly, can you remind me with platform you are using for testing?
It is Renesas Rcar Gen3. It is Big-Little platform, but currently we
use only four A57 cores.
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linux kernel? There will be no isolation, this is bad.
But:
- you can load proprietary modules if you want to
- they are fast
- you can interface with them in a nativest way possible: just call a function
Artem, could you please comment from your side?
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hat it
can be included in some module with different (but still open source)
license. But if you say that it can't... Then I don't know. It is out
of my competence. I'm not lawyer also.
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__
owledge. But now I'm
curios, why there are EXPORT_SYMBOL_GPL() and plain EXPORT_SYMBOL()? I
though it was intended to separate GPL and non-GPL code.
BTW, "non-GPL code" does not mean "closed-source code". It can be
LGPL, MIT, BSD, or Copyleft license. I can imagine proprietary li
fast
>> - you can interface with them in a nativest way possible: just call a
>> function
>
> Proprietary modules are a legal minefield. They are best avoided even in
> Linux. Fortunately, both EL0 apps and stubdoms could be proprietary.
> Thus, especially if you have a requi
is
use case. 8ms is an upper bound. If there will be three domains
sharing GPU, limit will be 6 ms. And, actually, one slice per domain
is not enough, because domain may be willing to render own portion
later. So, 1 ms will be more realistic requirement. I mean, that
stubdom with coproc driver
->PA translation in a command buffer, it
needs to execute SMCs (but we can limit it there, thanks to SMCCC),
probably it will need to inject vIRQ to guest to wake it up.
[1] https://github.com/lorc/xen/tree/staging-4.7/xen/arch/arm/optee
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mailto
per second (if I'm not wrong). I think,
scheduling latency is more important.
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2 and the null scheduler simultaneously on different
> sets of physical cpus using cpupools. For example, you can use the null
> scheduler on 2 physical cores and credit2 on the remaining cores.
Wow. Didn't know that.
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omains? This is TEE use case.
> Then you don't make that hypercall. :-) In any case you certainly can't
> use an EL0 app for that, at least the way we've been describing it.
That depends on how many right you will give to an EL0 app. I think,
it is possible to use it for this pur
On 26 May 2017 at 12:43, Volodymyr Babchuk wrote:
> Hi Dario,
>
Oops, sorry, George. There was two emails in a row: yours one and
Dario's one. And I overlooked to whom I'm answering.
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what I call 'scheduling latency'.
This latency can be minimized by mechanism similar to priority
inheritance: if scheduler knows that vcpu1 waits for vcpu2 and there
are remaining time slice for vcpu1 it should select vcpu2 as next
scheduled vcpu. Problem is how to populate such dependencies.
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t call
> random hypervisor functions?
It is impossible, indeed. As I said earlier, interface between app and
hypervisor would be similar to hypercall interface (or it would be
hypercall interface itself).
ARM provides native interface for syscalls in hypervisor mode. That
means, that if yo
Hi Julien,
On 14.06.17 17:21, Julien Grall wrote:
PSCI is part of HVC/SMC interface, so it should be handled in
appropriate place: `smccc.c`. This patch just moves PSCI
handler calls from `traps.c` to `smccc.c`.
PSCI is considered as two different "services" in terms of SMCCC.
Older PSCI 1.0 is
Hello all,
This patch series adds a generic way to handle standard calls
that are defined in ARM SMC calling convention (SMCCC).
First patch adds generic handler and second one moves PSCI
handling code to that generic handler.
With this patch series guest can query hypervisor in a standard
way t
t;, while never
PSCI 2.0 is defined as "standard secure service".
Also old accessors PSCI_ARG() and PSCI_RESULT_REG() were replaced
with generic set_user_reg()/get_user_reg() functions.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshche
Hypervisor Service.
Standard Hypervisor Service only supports query calls, so caller can
ask about hypervisor UID and determine that it is XEN running.
This change allows more generic handling for SMCs and HVCs and it can
be easily extended to support new services and functions.
Signed-off-by: Volodymyr
me (like 5PM), but 9AM also works for me.
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iv
>
>
> I could do 5PM PST without troubles, but:
>
> 2) 5PM PST = 1AM London = 3AM Kyiv
>
>
> I think it's best to stay with the first option :-)
Oh, it is *PM*. Yeah, my fault. I prefer first option, indeed :-)
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> bugs and duplication of functionality? Why not just use what we already
> have?
Because we are concerned about latency. In my benchmark, my native app
PoC is 1.6 times faster than stubdom.
[1] http://marc.info/?l=xen-devel&m=149151018801649&w=2
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;block me until new
requests". XEN blocks vcpu at this moment and unblocks it only when
there are another request ready. This is very promising idea. Need to
think about it further.
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mailto: vlad.babc...@gmail.com
instruction executing in AArch32 state. But we define this
struct for both ARMv7 and ARMv8, because ARMv8 encoding is backwards
compatible with ARMv7.
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/include/asm-arm/processor.h | 17 +
1 file changed, 17 insertions
it is unconditional.
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/arch/arm/traps.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index c07999b..eae2212 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/tr
is
additional flag (CCKNOWNPASS) to be checked before performing standard
handling of CCVALID and COND fields.
Signed-off-by: Volodymyr Babchuk
---
* Fixed spelling
* Fixed coding style in 'if ( )'
---
xen/arch/arm/traps.c | 19 ++-
1 file changed, 18 insertions(+),
Hello all,
This is 4th version of patch series:
* Fixed spelling in comments
* Fixed coding style
Volodymyr Babchuk (3):
arm: processor: add new struct hsr_smc32 into hsr union
arm: traps: handle unknown exceptions in check_conditional_instr()
arm: traps: handle SMC32 in
Hello Jan,
On Wed, Aug 09, 2017 at 05:58:19AM -0600, Jan Beulich wrote:
>
> > On 08/08/17 21:08, Volodymyr Babchuk wrote:
> >> +#ifndef __XEN_PUBLIC_ARCH_ARM_SMC_H__
> >> +#define __XEN_PUBLIC_ARCH_ARM_SMC_H__
> >> +
> >> +typedef struct {
>
Hi Jan,
On Thu, Aug 17, 2017 at 01:45:54AM -0600, Jan Beulich wrote:
> >>> On 16.08.17 at 23:41, wrote:
> > Hello Jan,
> >
> > On Wed, Aug 09, 2017 at 05:58:19AM -0600, Jan Beulich wrote:
> >
> >>
> >> > On
EE support.
---
Volodymyr Babchuk (11):
arm: traps: use generic register accessors in the PSCI code
arm: traps: check if SMC was conditional before handling it
public: xen.h: add definitions for UUID handling
arm: processor.h: add definition for immediate value mask
arm: add SMCC
There are standard functions set_user_reg() and get_user_reg(). We can
use them in PSCI_SET_RESULT()/PSCI_ARG() macroses instead of relying on
CONFIG_ARM_64 definition.
Signed-off-by: Volodymyr Babchuk
---
* Added space into reg,n
* Used 32-bit constant tin PSCI_ARG32
---
xen/arch/arm/traps.c
-by: Volodymyr Babchuk
---
xen/include/public/xen.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h
index 2ac6b1e..d1a4765 100644
--- a/xen/include/public/xen.h
+++ b/xen/include/public/xen.h
@@ -930,6 +930,15
This patch adds definition HSR_XXC_IMM_MASK. It can be used to extract
immediate value for trapped HVC32, HVC64, SMC64, SVC32, SVC64 instructions,
as described at ARM ARM (ARM DDI 0487B.a pages D7-2270, D7-2272).
Signed-off-by: Volodymyr Babchuk
---
xen/include/asm-arm/processor.h | 3 +++
1
Trapped SMC instruction can fail condition check on ARMv8 arhcitecture
(ARM DDI 0487B.a page D7-2271). So we need to check if condition was meet.
Signed-off-by: Volodymyr Babchuk
---
xen/arch/arm/traps.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/xen/arch/arm/traps.c b/xen/arch
is defined as "standard secure service" with own ranges
(ARM DEN 0028B, page 18).
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
---
* Fixed mistakes about non-existant PSCI 2.0
* Added special SMC function number handling fo
handler).
Signed-off-by: Volodymyr Babchuk
---
xen/include/asm-arm/smccc.h | 92 +
1 file changed, 92 insertions(+)
create mode 100644 xen/include/asm-arm/smccc.h
diff --git a/xen/include/asm-arm/smccc.h b/xen/include/asm-arm/smccc.h
new file mode 100644
SMC is forwarded to standard SMCCC handler, it can be routed
to a domain monitor, if one is installed.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
---
* Reworked UUID handling (due to new UUID type definition)
* Renamed
y both use PSCI
function numbers.
Signed-off-by: Volodymyr Babchuk
---
* Reworked definitions to minimize their lenght
* Described why I replaced PSCI_0_2_FN_xxx with PSCI_0_2_FUNC_xxx
---
xen/arch/arm/platforms/seattle.c | 5 +++--
xen/arch/arm/psci.c | 10 -
xen/arch/
This feature indicates that hypervisor is compatible with ARM
SMC calling convention. Hypervisor will not inject an undefined
instruction exception if an invalid SMC function were called and
will not crash a domain if an invlalid HVC functions were called.
Signed-off-by: Volodymyr Babchuk
from 64 bit caller.
This patch removes that extra check.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Stefano Stabellini
---
* Used case xxx:
{
}
formatting as Julien suggested
---
xen/arch/arm/vsmc.c | 63 +
1 file
As Xen now supports SMCCC, we can enable this feature to tell
guests that it is safe to call generic SMCs and HVCs.
Signed-off-by: Volodymyr Babchuk
---
xen/common/kernel.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/xen/common/kernel.c b/xen/common/kernel.c
index ce7cb8a..18c4d51
Hi Jan,
On 22.08.17 10:26, Jan Beulich wrote:
On 21.08.17 at 22:27, wrote:
--- a/xen/include/public/xen.h
+++ b/xen/include/public/xen.h
@@ -930,6 +930,15 @@ __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
__DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t
Hello Jan
On 23.08.17 11:10, Jan Beulich wrote:
On 22.08.17 at 16:37, wrote:
I can't see why you want to map UUID to a certain structure.
This is so that the type cannot mistakenly be passed to a function
taking unsigned char *, or be assigned to a variable of that type.
Right, I see the po
Hi Julien,
Thanks for the review.
On 24.08.17 19:58, Julien Grall wrote:
Hi Volodymyr,
On 21/08/17 21:27, Volodymyr Babchuk wrote:
PSCI is part of HVC/SMC interface, so it should be handled in
appropriate place: `vsmc.c`. This patch just moves PSCI
handler calls from `traps.c` to `vsmc.c
Hi,
On 24.08.17 20:22, Julien Grall wrote:
Hi Volodymyr,
On 21/08/17 21:27, Volodymyr Babchuk wrote:
smccc.h provides definitions to construct SMC call function number
according
to SMCCC. We don't need multiple definitions for one thing, and
definitions
in smccc.h are more generic than
Hi Julien,
On 24.08.17 18:00, Julien Grall wrote:
Hi Volodymyr,
Title: No need for the full stop.
On 21/08/17 21:27, Volodymyr Babchuk wrote:
This patch adds generic definitions used in ARM SMC call convention.
Those definitions was taken from linux header arm-smccc.h, extended
and formatted
Hi Jan,
On 23.08.17 14:29, Jan Beulich wrote:
On 23.08.17 at 13:08, wrote:
On 23.08.17 11:10, Jan Beulich wrote:
On 22.08.17 at 16:37, wrote:
I can't see why you want to map UUID to a certain structure.
This is so that the type cannot mistakenly be passed to a function
taking unsigned cha
Hi Jan,
On 31.08.17 10:34, Jan Beulich wrote:
On 30.08.17 at 18:20, wrote:
My first intention was to declare union with all possible
representations, so it would be possible to access the same UUID as an
array of bytes or, for example, as Microsoft GUID. Like this:
typedef union {
/* UU
Hello Sergej,
On 31.08.17 15:20, Sergej Proskurin wrote:
Hi Volodymyr, hi Julien,
On 08/24/2017 07:25 PM, Julien Grall wrote:
On 21/08/17 21:27, Volodymyr Babchuk wrote:
This feature indicates that hypervisor is compatible with ARM
SMC calling convention. Hypervisor will not inject an
On 31.08.17 15:53, Jan Beulich wrote:
On 31.08.17 at 14:24, wrote:
Hi Jan,
On 31.08.17 10:34, Jan Beulich wrote:
On 30.08.17 at 18:20, wrote:
My first intention was to declare union with all possible
representations, so it would be possible to access the same UUID as an
array of bytes or,
Hi Sergej
On 31.08.17 16:51, Sergej Proskurin wrote:
Hi Volodymyr,
On 08/31/2017 02:44 PM, Volodymyr Babchuk wrote:
Hello Sergej,
On 31.08.17 15:20, Sergej Proskurin wrote:
Hi Volodymyr, hi Julien,
On 08/24/2017 07:25 PM, Julien Grall wrote:
On 21/08/17 21:27, Volodymyr Babchuk wrote
y hypervisor in a standard
way to determine which virtualization system is used.
The same applies to PSCI calls. Now guest can tell if PSCI calls
are handled by hypervisor or by, say, ARM TF.
Also those patches are needed for upcoming TEE support.
---
Volodymyr Babchuk (10):
arm: traps: use g
(like PSCI) and by SMCCC
servers (like vPSCI or upcoming generic SMCCC handler).
Signed-off-by: Volodymyr Babchuk
---
* Accessor macros were converted to inlined functions
* ARM_SMCCC_SMC_{32,64} renamed to ARM_SMCCC_CONV_{32,64}
* Fixed indentation for ARM_SMCCC_CALL_VAL
---
xen/include/asm
This patch define HSR_XXC_IMM_MASK. It can be used to extract
immediate value for trapped HVC32, HVC64, SMC64, SVC32, SVC64
instructions, as described in the ARM ARM
(ARM DDI 0487B.a pages D7-2270, D7-2272).
Signed-off-by: Volodymyr Babchuk
---
* spelling fixes
---
xen/include/asm-arm
There are standard functions set_user_reg() and get_user_reg(). We can
use them in PSCI_SET_RESULT()/PSCI_ARG() macros instead of relying on
CONFIG_ARM_64 definition.
Signed-off-by: Volodymyr Babchuk
---
* removed 0x mask
* coding style left unchanged, because it will be fixed in next
-by: Volodymyr Babchuk
---
* Array was wrapped into a structure
---
xen/include/public/xen.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h
index 2ac6b1e..3dc81e3 100644
--- a/xen/include/public/xen.h
+++ b/xen/include
ll be constructed using generic macros from smccc.h.
Function psci_mode_check() in vsmc.c will be removed in a next patch,
so there are no need to review it. I had to rework it, because
PSCI_0_2_64BIT definition is dropped now.
Signed-off-by: Volodymyr Babchuk
---
* removed #include from seat
existing APIs (ARM DEN 0028B, page 16), while newer
PSCI 0.2 and later is defined as "standard secure service" with its
own ranges (ARM DEN 0028B, page 18).
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
---
* handle_psci_0_x()
Trapped SMC instruction can fail condition check on ARMv8 architecture
(ARM DDI 0487B.a page D7-2271). So we need to check if condition was meet.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
* added Julien's R-b tag
---
xen/arch/arm/traps.c | 6 ++
1 file chang
SMC is forwarded to standard SMCCC handler, it can be routed
to a domain monitor, if one is installed.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
---
* reworked fill_uuid() function
* dropped vsmc.h header. Function prototypes
from 64 bit caller.
This patch removes that extra check.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Stefano Stabellini
---
xen/arch/arm/vsmc.c | 62 ++---
1 file changed, 26 insertions(+), 36 deletions(-)
diff --git a/xen/arch/arm/vsmc.c b/xen
means that it safe to invoke
SMC/HVC calls that are compatible with SMC calling convention.
Signed-off-by: Volodymyr Babchuk
---
xen/common/kernel.c | 3 +++
xen/include/public/features.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/xen/common/kernel.c b/xen/common/kernel.c
Trapped SMC instruction can fail condition check on ARMv8 architecture
(ARM DDI 0487B.a page D7-2271). So we need to check if condition was meet.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
xen/arch/arm/traps.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/xen
According to SMCCC (ARM DEN 0028B, page 12), function id is
stored in least 32 bits of r0/x0 register:
The least significant 32-bits are used, and the most significant
32-bits are zero. Implementations must ignore the least significant
bits.
Signed-off-by: Volodymyr Babchuk
---
xen
little-endian, some are big-endian).
Signed-off-by: Volodymyr Babchuk
---
* Fixed example for XEN_DEFINE_UUID() usage. Was
XEN_DEFINE_UUID(0x00112233, 0x4455, 0x6677, 0x8899, 0xaabbccddeeff)
* Added comment to xen.h
* Used
#if defined (__STDC_VERSION__) && __STDC_VERSION__ &g
series guest can query hypervisor in a standard
way to determine which virtualization system is used.
The same applies to PSCI calls. Now guest can tell if PSCI calls
are handled by hypervisor or by, say, ARM TF.
Also those patches are needed for upcoming TEE support.
---
Volodymyr Babchuk (11):
This patch defines HSR_XXC_IMM_MASK. It can be used to extract
immediate value for trapped HVC32, HVC64, SMC64, SVC32, SVC64
instructions, as described in the ARM ARM
(ARM DDI 0487B.a pages D7-2270, D7-2272).
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/include/asm-arm
There are standard functions set_user_reg() and get_user_reg(). We can
use them in PSCI_SET_RESULT()/PSCI_ARG() macros instead of relying on
CONFIG_ARM_64 definition.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
xen/arch/arm/traps.c | 38
SMC is forwarded to standard SMCCC handler, it can be routed
to a domain monitor, if one is installed.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
Acked-by: Julien Grall
---
xen/arch/arm/Makefile | 1 +
xen/arch/arm
ll be constructed using generic macros from smccc.h.
Function psci_mode_check() in vsmc.c will be removed in a next patch,
so there are no need to review it. I had to rework it, because
PSCI_0_2_64BIT definition is dropped now.
Signed-off-by: Volodymyr Babchuk
---
* Fixed indentation for
#d
existing APIs (ARM DEN 0028B, page 16), while newer
PSCI 0.2 and later is defined as "standard secure service" with its
own ranges (ARM DEN 0028B, page 18).
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
---
* Used least 32 bi
acros were converted to inlined functions to ease parsing.
They can be used by both SMCCC clients (like PSCI) and by SMCCC
servers (like vPSCI or upcoming generic SMCCC handler).
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/include/asm-arm/smc
means that it safe to invoke
SMC/HVC calls that are compatible with SMC calling convention.
Signed-off-by: Volodymyr Babchuk
---
xen/common/kernel.c | 3 +++
xen/include/public/features.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/xen/common/kernel.c b/xen/common/kernel.c
from 64 bit caller.
This patch removes that extra check.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Stefano Stabellini
---
xen/arch/arm/vsmc.c | 62 ++---
1 file changed, 26 insertions(+), 36 deletions(-)
diff --git a/xen/arch/arm/vsmc.c b/xen
Hi Konrad,
On 05.10.17 16:03, Konrad Rzeszutek Wilk wrote:
On Thu, Oct 05, 2017 at 12:00:20AM +0300, Volodymyr Babchuk wrote:
Added type xen_uuid_t. This type represents UUID as an array of 16
bytes in big endian format.
Added macro XEN_DEFINE_UUID that constructs UUID in the usual way
Hi Julien,
On 10.10.17 18:19, Julien Grall wrote:
Hi,
On 09/10/17 10:40, George Dunlap wrote:
On 10/05/2017 03:50 PM, Volodymyr Babchuk wrote:
Hi Konrad,
On 05.10.17 16:03, Konrad Rzeszutek Wilk wrote:
On Thu, Oct 05, 2017 at 12:00:20AM +0300, Volodymyr Babchuk wrote:
Added type
According to SMCCC (ARM DEN 0028B, page 12), function id is
stored in least 32 bits of r0/x0 register:
The least significant 32-bits are used, and the most significant
32-bits are zero.
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
* Removed part of the quote from ARM
guest can tell if PSCI calls
are handled by hypervisor or by, say, ARM TF.
Also those patches are needed for upcoming TEE support.
---
Volodymyr Babchuk (11):
arm: traps: use only least 32 bits of fid in PSCI handler
arm: traps: use generic register accessors in the PSCI code
arm: traps
Trapped SMC instruction can fail condition check on ARMv8 architecture
(ARM DDI 0487B.a page D7-2271). So we need to check if condition was meet.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
xen/arch/arm/traps.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/xen
There are standard functions set_user_reg() and get_user_reg(). We can
use them in PSCI_SET_RESULT()/PSCI_ARG() macros instead of relying on
CONFIG_ARM_64 definition.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
xen/arch/arm/traps.c | 38
This patch defines HSR_XXC_IMM_MASK. It can be used to extract
immediate value for trapped HVC32, HVC64, SMC64, SVC32, SVC64
instructions, as described in the ARM ARM
(ARM DDI 0487B.a pages D7-2270, D7-2272).
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/include/asm-arm
big-endian. The structure defined in this
patch, unlike EFI_GUID, is compatible with the Linux kernel and libuuid.
Signed-off-by: Volodymyr Babchuk
---
* Changed commit message ("NB:" part). Thanks to George Dunlap
for suggestion.
---
xen/include/public/
acros were converted to inlined functions to ease parsing.
They can be used by both SMCCC clients (like PSCI) and by SMCCC
servers (like vPSCI or upcoming generic SMCCC handler).
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/include/asm-arm/smc
SMC is forwarded to standard SMCCC handler, it can be routed
to a domain monitor, if one is installed.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
Acked-by: Julien Grall
---
xen/arch/arm/Makefile | 1 +
xen/arch/arm
ll be constructed using generic macros from smccc.h.
Function psci_mode_check() in vsmc.c will be removed in a next patch,
so there are no need to review it. I had to rework it, because
PSCI_0_2_64BIT definition is dropped now.
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/arc
means that it safe to invoke
SMC/HVC calls that are compatible with SMC calling convention.
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
Acked-by: Jan Beulich
---
xen/common/kernel.c | 3 +++
xen/include/public/features.h | 3 +++
2 files changed, 6 insertions(+)
diff --git
from 64 bit caller.
This patch removes that extra check.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
* Dropped Stefano's R-b, added Julien's one.
---
xen/arch/arm/vsmc.c | 62 ++---
1 file changed, 26 insertions(+), 36
existing APIs (ARM DEN 0028B, page 16), while newer
PSCI 0.2 and later is defined as "standard secure service" with its
own ranges (ARM DEN 0028B, page 18).
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Oleksandr Andrushchenko
Reviewed-by: Oleksandr Tyshchenko
Acked-by: Ju
Hello Jan,
On 10.10.17 19:12, Jan Beulich wrote:
On 10.10.17 at 17:52, wrote:
--- a/xen/include/public/xen.h
+++ b/xen/include/public/xen.h
@@ -930,6 +930,39 @@ __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
__DEFINE_XEN_GUEST_HANDLE(uint64, uint6
and big-endian. The structure defined in this
patch, unlike EFI_GUID, is compatible with the Linux kernel and libuuid.
Signed-off-by: Volodymyr Babchuk
---
* Fixed code formatting
* Added parenthess around (xen_uuid_t)XEN_DEFINE_UUID_(..)
---
xen/include/public/xen.h | 33
big-endian. The structure defined in this
patch, unlike EFI_GUID, is compatible with the Linux kernel and libuuid.
Signed-off-by: Volodymyr Babchuk
---
* Added check `|| defined(__GNUC__) to
#if (defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L)
---
xen/include/public
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