ables, access to which might be restricted by the
active VTTBR. To address this issue, we perform the gva to ipa
translation in software.
Signed-off-by: Sergej Proskurin
---
Cc: Razvan Cojocaru
Cc: Tamas K Lengyel
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/arch/arm/mem_access.c
The TTBCR_SZ holds only 3 bits and thus must be masked with the value
0x7 instead of the previously used value 0xf.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
he 32-bit guests with a short-descriptor translation table
format is not yet supported.
The following patch series can be found on Github[0].
Cheers,
~Sergej
[0] https://github.com/sergej-proskurin/xen (branch arm-gpt-walk-v1)
Sergej Proskurin (4):
arm/mem_access: Move TTBCR_SZ_MASK to proces
This commit adds further TCR_EL1/TTBCR defines to simplify access to the
respective register contents.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 4
1 file changed, 4 insertions(+)
diff --git a/xen/include/asm-arm
This commit moves the define TTBCR_SZ_MASK from smmu.c to processor.h as
it will be additionally used in mem_access.c as shown in one of the
following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/drivers/passthrough/arm/smmu.c | 1 -
xen/include
Hi Razvan,
Sure thing. Thanks anyway :)
Cheers,
~Sergej
On 05/01/2017 04:38 PM, Razvan Cojocaru wrote:
> On 04/30/2017 10:48 PM, Sergej Proskurin wrote:
>> The function p2m_mem_access_check_and_get_page in mem_access.c
>> translates a gva to an ipa by means of the hardwar
Hi Julien,
On 05/02/2017 01:56 PM, Julien Grall wrote:
> Hi Sergej,
>
> On 30/04/17 20:48, Sergej Proskurin wrote:
>> The TTBCR_SZ holds only 3 bits and thus must be masked with the value
>> 0x7 instead of the previously used value 0xf.
>
> Please quote the spec (para
Hi Julien,
On 05/02/2017 02:01 PM, Julien Grall wrote:
>
>
> On 02/05/17 12:56, Julien Grall wrote:
>> Hi Sergej,
>>
>> On 30/04/17 20:48, Sergej Proskurin wrote:
>>> The TTBCR_SZ holds only 3 bits and thus must be masked with the value
>>>
Hi Julien,
On 05/02/2017 05:17 PM, Julien Grall wrote:
> Hi Sergej,
>
> On 30/04/17 20:48, Sergej Proskurin wrote:
>> The function p2m_mem_access_check_and_get_page in mem_access.c
>> translates a gva to an ipa by means of the hardware functionality
>> implemented in
Hi,
>> What you currently do is try gva_to_ipa and if it does not work >> you will
>> call p2m_gva_to_ipa. This sounds a bit pointless to me and
>> waste of time if the underlying memory of stage-1 page table is >>
protected. > > But we don't know that the stage-1 page table is
protected until th
The current implementation does not provide appropriate types for
short-descriptor translation table entries. As such, this commit adds new
types, which simplify managing the respective translation table entries.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
M DDI 0487A-g J11-5608, J11-5679, and ARM DDI 0406C-b
B3-1510.
Note that the current implementation lacks support for 32-bit EL0
running on top of 64-bit EL1. The associated location in the code is
marked appropriately.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
-
This commit adds two defines holding the register width of 32 bit and 64 bit
registers. These defines simplify using the associated constants in the
following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 4
1
This commit adds (TCR_|TTBCR_)* defines to simplify access to the respective
register contents.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Define TCR_SZ_MASK in a way so that it can be also applied to 32-bit guests
using the long-descriptor
The ARMv8 architecture supports pages with different (4K, 16K, and 64K) sizes.
To enable guest page table walks for various configurations, this commit
extends the defines and helpers of the current implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
The ARMv8 architecture supports pages with different (4K, 16K, and 64K) sizes.
To enable guest page table walks for various configurations, this commit
extends the defines and helpers of the current implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
-step potential
translation errors in the function p2m_mem_access_check_and_get_page due to
restricted memory (e.g. to the guest's page tables themselves), we walk the
guest's page tables in software.
Signed-off-by: Sergej Proskurin
---
Cc: Razvan Cojocaru
Cc: Tamas K Lengyel
Cc: Stefano
The current implementation does not provide appropriate types for
short-descriptor translation table entries. As such, this commit adds new
types, which simplify managing the respective translation table entries.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
rch32/Aarch64).
The following patch series can be found on Github[0].
Cheers,
~Sergej
[0] https://github.com/sergej-proskurin/xen (branch arm-gpt-walk-v2)
Sergej Proskurin (8):
arm/mem_access: Add (TCR_|TTBCR_)* defines
arm/mem_access: Add defines holding the width of 32/64bit regs
This commit adds functionality to walk the guest's page tables using the
short-descriptor translation table format for both ARMv7 and ARMv8. The
implementation is based on ARM DDI 0487A-g G4-4189 and ARM DDI 0406C-b
B3-1506.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: J
-step potential
translation errors in the function p2m_mem_access_check_and_get_page due to
restricted memory (e.g. to the guest's page tables themselves), we walk the
guest's page tables in software.
Signed-off-by: Sergej Proskurin
---
Cc: Razvan Cojocaru
Cc: Tamas K Lengyel
Cc: Stefano
This commit adds functionality to walk the guest's page tables using the
short-descriptor translation table format for both ARMv7 and ARMv8. The
implementation is based on ARM DDI 0487A-g G4-4189 and ARM DDI 0406C-b
B3-1506.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: J
1_EL1, and SCTLR_EL1.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Rename p2m_gva_to_ipa to p2m_walk_gpt and move it to p2m.c.
Move the functionality responsible for walking long-descriptor based
translation tables out of the function p2m_walk_gpt. Als
This commit adds (TCR_|TTBCR_)* defines to simplify access to the respective
register contents.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Define TCR_SZ_MASK in a way so that it can be also applied to 32-bit guests
using the long-descriptor
M DDI 0487A-g J11-5608, J11-5679, and ARM DDI 0406C-b
B3-1510.
Note that the current implementation lacks support for 32-bit EL0
running on top of 64-bit EL1. The associated location in the code is
marked appropriately.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
-
1_EL1, and SCTLR_EL1.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Rename p2m_gva_to_ipa to p2m_walk_gpt and move it to p2m.c.
Move the functionality responsible for walking long-descriptor based
translation tables out of the function p2m_walk_gpt. Als
This commit adds two defines holding the register width of 32 bit and 64 bit
registers. These defines simplify using the associated constants in the
following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 4
1
Hi Julien,
On 06/02/2017 05:13 PM, Julien Grall wrote:
> I have two series on my inbox with the same patches. I assume it is a
> mistake and only reviewed the "RFC PATCH v2" version.
>
> Let me know if it is not right.
there was a mistake during the submission process so that the same patch
se
Hi Julien,
[...]
>
> Also, a lot of the new defines you add are for TCR_EL1 and not TCR_EL2.
> Please make the distinction in the name to avoid misusing them.
>
>> +
>> +#define TCR_TB_31 (31)
>> #ifdef CONFIG_ARM_64
>> #define TCR_PS(x) ((x)<<16)
>> #define TCR_TBI
Hi Julien,
[...]
> I know I suggested to move in p2m.c. Looking at the diff stat, this
> will increase quite a lot p2m.c which is already big.
>
> How about introducing a file guest_walk.c which contain the new
> functions?
>
No problem at all. I will gladly move the functionality into a separat
Hi Julien,
[...]
>
>> +{
>> +input_size = REGISTER_WIDTH_64_BIT - t0_sz;
>> +
>> +if ( input_size > IPS_MAX )
>> +/* We limit the input_size to be max 48 bit. */
>> +input_size = IPS_MAX;
>> +else if ( input_size < IPS_MI
Hi Julien,
>
>> +
>> +const unsigned int strides[3] = {
>> +LPAE_SHIFT_4K,
>> +LPAE_SHIFT_16K,
>> +LPAE_SHIFT_64K
>> +};
>
> Also, the stride can be found from the page shift. So I am not
> convinced you need that.
Sure, but don't you think it is cleaner doing it
Hi Julien,
On 06/12/2017 12:44 PM, Julien Grall wrote:
>
>
> On 12/06/17 11:12, Sergej Proskurin wrote:
>> Hi Julien,
>
> Hello Sergej,
>
>>>
>>>> +
>>>> +const unsigned int strides[3] = {
>>>> +LPAE
This commit adds two defines holding the register width of 32 bit and 64 bit
registers. These defines simplify using the associated constants in the
following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/processor.h | 4
1
TTBR0_EL1, TTBR1_EL1, and
SCTLR_EL1.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Rename p2m_gva_to_ipa to p2m_walk_gpt and move it to p2m.c.
Move the functionality responsible for walking long-descriptor based
translation tables out of the function p2
We extend the current implementation by an additional permission,
GV2M_EXEC, which will be used to describe execute permissions of PTE's
as part of our guest translation table walk implementation.
Signed-off-by: Sergej Proskurin
---
Cc:
---
xen/include/asm-arm/page.h | 1 +
1 file chang
This commit adds (TCR_|TTBCR_)* defines to simplify access to the
respective register contents. At the same time, we adjust the macro
TCR_T0SZ by using the newly introduced TCR_T0SZ_SHIFT instead of the
hardcoded value.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
The current implementation does not provide appropriate types for
short-descriptor translation table entries. As such, this commit adds new
types, which simplify managing the respective translation table entries.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
In this commit we make the p2m_* helpers, which access PTE properties in
a simplified way, publicly available. This is due to the fact that the
helpers will be used in guest_walk.c in one of the following commits.
Signed-off-by: Sergej Proskurin
---
Cc:
---
xen/arch/arm/p2m.c| 23
The ARMv8 architecture supports pages with different (4K, 16K, and 64K) sizes.
To enable guest page table walks for various configurations, this commit
extends the defines and helpers of the current implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
hub[0].
Cheers,
~Sergej
[0] https://github.com/sergej-proskurin/xen (branch arm-gpt-walk-v3)
Sergej Proskurin (10):
arm/mem_access: Add (TCR_|TTBCR_)* defines
arm/mem_access: Add defines holding the width of 32/64bit regs
arm/mem_access: Add defines supporting PTs with varying page sizes
M DDI 0487B-a J1-5922, J1-5999, and ARM DDI 0406C-b B3-1510.
Note that the current implementation lacks support for Large VA/PA on
ARMv8.2 architectures (LVA/LPA, 52-bit virtual and physical address
sizes). The associated location in the code is marked appropriately.
Signed-off-by: Sergej Proskurin
-
This commit adds functionality to walk the guest's page tables using the
short-descriptor translation table format for both ARMv7 and ARMv8. The
implementation is based on ARM DDI 0487B-a J1-6002 and ARM DDI 0406C-b
B3-1506.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: J
-step potential translation errors in the function
p2m_mem_access_check_and_get_page due to restricted memory (e.g. to the
guest's page tables themselves), we walk the guest's page tables in
software.
Signed-off-by: Sergej Proskurin
---
Cc: Razvan Cojocaru
Cc: Tamas K Lengyel
Cc: Stefano
Hi Andrew,
On 06/15/2017 09:49 PM, Andrew Cooper wrote:
> On 15/06/17 20:44, Julien Grall wrote:
>> Hi Andrew,
>>
>> On 06/15/2017 01:03 PM, Andrew Cooper wrote:
>>> On 15/06/17 12:05, Sergej Proskurin wrote:
>>>> The current implementation does no
Hi Julien,
On 06/15/2017 09:53 PM, Julien Grall wrote:
> Hi Sergej,
>
> On 06/15/2017 12:05 PM, Sergej Proskurin wrote:
>> In this commit we make the p2m_* helpers, which access PTE properties in
>> a simplified way, publicly available. This is due to the fact that the
>&
Hi Julien,
On 06/16/2017 08:23 PM, Julien Grall wrote:
> Hi Sergej,
>
> On 06/16/2017 04:44 PM, Sergej Proskurin wrote:
>> Thanks. I have moved the upper helpers to page.h for now and renamed
>> them to lpae_* helpers as part of my most recent patch version. The
>>
Hi Tamas,
[...]
>> +
>> +if ( ((flag & GV2M_WRITE) == GV2M_WRITE) && !(perms & GV2M_WRITE) )
>
> Wouldn't it be enough to do (flag & GV2M_WRITE) without the following
> comparison? Also, a comment explaining why this is an error-condition
> would be nice.
>
Yes, you are absolutely cor
Hi Julien,
On 08/15/2017 12:13 PM, Julien Grall wrote:
>
>
> On 14/08/17 22:03, Sergej Proskurin wrote:
>> Hi Julien,
>>
>> On 08/14/2017 07:37 PM, Julien Grall wrote:
>>> Hi Sergej,
>>>
>>> On 09/08/17 09:20, Sergej Proskurin wrote:
>&g
Hi all,
On 08/09/2017 10:20 AM, Sergej Proskurin wrote:
> The current implementation of GENMASK is capable of creating bitmasks of
> 32-bit values on AArch32 and 64-bit values on AArch64. As we need to
> create masks for 64-bit values on AArch32 as well, in this commit we
> i
Hi all,
On 08/16/2017 12:28 AM, Andrew Cooper wrote:
> On 15/08/2017 23:25, Stefano Stabellini wrote:
>> On Tue, 15 Aug 2017, Julien Grall wrote:
>>> On 14/08/17 22:03, Sergej Proskurin wrote:
>>>> Hi Julien,
>>>>
>>>> On 08/14/2017 07:37 PM,
Hi Julien,
On 08/09/2017 10:20 AM, Sergej Proskurin wrote:
> This commit moves the function vgic_access_guest_memory to guestcopy.c
> and the header asm/guest_access.h. No functional changes are made.
> Please note that the function will be renamed in the following commit.
>
>
On 08/16/2017 12:11 PM, Julien Grall wrote:
>
>
> On 16/08/17 10:58, Sergej Proskurin wrote:
>> Hi Julien,
>>
>>
>> On 08/09/2017 10:20 AM, Sergej Proskurin wrote:
>>> This commit moves the function vgic_access_guest_memory to guestcopy.c
>>&g
been discussed with the associated maintainers and accordingly stated in
the individual patches.
The following patch series can be found on Github[0].
Cheers,
~Sergej
[0] https://github.com/sergej-proskurin/xen (branch arm-gpt-walk-v9)
Sergej Proskurin (13):
arm/mem_access: Add and cleanup (TCR_|T
We extend the current implementation by an additional permission,
GV2M_EXEC, which will be used to describe execute permissions of PTE's
as part of our guest translation table walk implementation.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: J
This commit adds functionality to walk the guest's page tables using the
short-descriptor translation table format for both ARMv7 and ARMv8. The
implementation is based on ARM DDI 0487B-a J1-6002 and ARM DDI 0406C-b
B3-1506.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: St
commits.
Signed-off-by: Sergej Proskurin
Reviewed-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v4: We reused the previous commit with the msg "arm/mem_access: Add
defines holding the width of 32/64bit regs" from v3, as we can reuse
the already exist
TTBR0_EL1, TTBR1_EL1, and
SCTLR_EL1.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Rename p2m_gva_to_ipa to p2m_walk_gpt and move it to p2m.c.
Move the functionality responsible for walking long-descriptor based
translation tab
This commit introduces a new helper that checks whether the target PTE
holds a page mapping or not. This helper will be used as part of the
following commits.
Signed-off-by: Sergej Proskurin
Reviewed-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v6: Change the name of the
This commit moves the function vgic_access_guest_memory to guestcopy.c
and the header asm/guest_access.h. No functional changes are made.
Please note that the function will be renamed in the following commit.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc
AArch64 supports pages with different (4K, 16K, and 64K) sizes. To
enable guest page table walks for various configurations, this commit
extends the defines and helpers of the current implementation.
Signed-off-by: Sergej Proskurin
Reviewed-by: Julien Grall
---
Cc: Stefano Stabellini
Cc
This commit adds (TCR_|TTBCR_)* defines to simplify access to the
respective register contents. At the same time, we adjust the macros
TCR_T0SZ and TCR_TG0_* by using the newly introduced TCR_T0SZ_SHIFT and
TCR_TG0_SHIFT instead of the hardcoded values.
Signed-off-by: Sergej Proskurin
Acked-by
implementation has been lifted from the linux kernel source
code.
Signed-off-by: Sergej Proskurin
Reviewed-by: Stefano Stabellini
---
Cc: Andrew Cooper
Cc: George Dunlap
Cc: Ian Jackson
Cc: Jan Beulich
Cc: Julien Grall
Cc: Konrad Rzeszutek Wilk
Cc: Stefano Stabellini
Cc: Tim Deegan
Cc: Wei Liu
---
v6
The current implementation does not provide appropriate types for
short-descriptor translation table entries. As such, this commit adds new
types, which simplify managing the respective translation table entries.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
eliminate artefacts of the function's
previous location.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v6: We added this patch to our patch series.
v7: Renamed the function's argument ipa back to gpa.
Removed any men
M DDI 0487B.a J1-5922, J1-5999, and ARM DDI 0406C.b B3-1510.
Note that the current implementation lacks support for Large VA/PA on
ARMv8.2 architectures (LVA/LPA, 52-bit virtual and physical address
sizes). The associated location in the code is marked appropriately.
Signed-off-by: Sergej Proskurin
-step potential translation errors in the function
p2m_mem_access_check_and_get_page due to restricted memory (e.g. to the
guest's page tables themselves), we walk the guest's page tables in
software.
Signed-off-by: Sergej Proskurin
Acked-by: Tamas K Lengyel
---
Cc: Razvan Cojocaru
Cc: Tama
The current implementation configures the test environment to always
trap on writes to the CR4 control register, even on ARM. This leads to
issues as calling xc_monitor_write_ctrlreg on ARM with VM_EVENT_X86_CR4
will always fail.
Signed-off-by: Sergej Proskurin
---
Cc: Razvan Cojocaru
Cc: Tamas
In ./xen/arch/arm/p2m.c, we compare the gfn's with INVALID_GFN
throughout the code. Thus it makes sense to use the macro INVALID_GFN
instead of a hard coded value to initialize "p2m->lowest_mapped_gfn".
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Gr
prototypes have
been extended to hold another argument (of type struct p2m_domain *).
This allows to specify the p2m/altp2m domain that should be processed by
the individual function -- instead of accessing the host's default p2m
domain.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellin
This commit adds the function "altp2m_switch_vcpu_altp2m_by_id" that is
executed after checking whether the vcpu should be switched to a different
altp2m within the function "altp2m_check".
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3:
idual commits.
Best regards,
~Sergej
[0] https://github.com/sergej-proskurin/xen (branch arm-altp2m-v4)
[1] https://summerofcode.withgoogle.com/projects/#4970052843470848
Sergej Proskurin (38):
arm/p2m: Introduce p2m_(switch|restore)_vttbr_and_(g|s)et_flags
arm/p2m: Add first altp2m HVMOP
This commit adds the function "altp2m_lazy_copy" implementing the altp2m
paging mechanism. The function "altp2m_lazy_copy" lazily copies the
hostp2m's mapping into the currently active altp2m view on 2nd stage
translation faults on instruction or data access.
Signed
and and altp2m
for ARM architectures. We also extend the documentation of the option "altp2m"
in ./docs/man/xl.cfg.pod.5.in.
Signed-off-by: Sergej Proskurin
---
Cc: Ian Jackson
Cc: Wei Liu
---
tools/libxl/libxl.h | 10 +-
tools/libxl/libxl_dom.c | 16 +
XEN_ALTP2M_disabled are
also valid for the ARM architecture.
Signed-off-by: Sergej Proskurin
Signed-off-by: Tamas K Lengyel
---
Cc: Ian Jackson
Cc: Wei Liu
---
v4: We added this patch to our patch series.
---
docs/man/xl.cfg.pod.5.in | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff
domains.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/arch/arm/hvm.c | 65 ++
1 file changed, 56 insertions(+), 9 deletions(-)
diff --git a/xen/arch/arm/hvm.c b/xen/arch/arm/hvm.c
index 042bdda979
This commit adds a p2m class to the struct p2m_domain to distinguish
between the host's original p2m and alternate p2m's. The need for this
functionality will be shown in the following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v4: Cha
This commit introduces the macro "p2m_get_active_p2m" returning the
currently active (alt)p2m. The need for this macro will be shown in the
following commits.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v4: Moved the introd
In this commit, we extend the function prototype of "__p2m_get_mem_access" to
hold an argument of type "struct p2m_domain*", as we need to distinguish
between the host's p2m and different altp2m views.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Juli
Signed-off-by: Sergej Proskurin
Acked-by: Razvan Cojocaru
---
Cc: Razvan Cojocaru
Cc: Tamas K Lengyel
Cc: Ian Jackson
Cc: Wei Liu
---
tools/tests/xen-access/xen-access.c | 33 -
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/tools/tests/xen
This commit does not change or introduce any additional functionality
but rather is a part of the following commit that alters the
functionality of the function "p2m_alloc_vmid".
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/arch/arm/
This commit adds the functionality to change mfn mappings for specified
gfn's in altp2m views. This mechanism can be used within the context of
VMI, e.g., to establish stealthy debugging.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3: Moved the altp2m
statement,
future implementation should determine, which HVMOPs can be executed
concurrently.
Also, the struct arch_domain is extended with the altp2m_active
attribute, representing the current altp2m activity configuration of the
domain.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano
This commit introduces macros for switching and restoring the vttbr
considering the currently set irq flags. We define these macros, as the
following commits will use the associated functionality multiple times
throughout different files.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano
The p2m initialization now invokes initialization routines responsible
for the allocation and initialization of altp2m structures. The same
applies to teardown routines. The functionality has been adopted from
the x86 altp2m implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano
m being modified is the
hostp2m.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/arch/arm/p2m.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index c5bf64aee0..246250d8c6 100644
--- a/xen
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Cosmetic fixes.
v3: Cosmetic fixes.
Renamed the function "altp2m_init_next" to
"altp2m_init_next_available".
Exchanged the check "altp2m_vttbr[i
The HVMOP_altp2m_set_domain_state allows to activate altp2m on a
specific domain. This commit adopts the x86
HVMOP_altp2m_set_domain_state implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Dynamically allocate memory for altp2m views only when
s p2m
table for the associated gva to ma translation. This is required at this
point, as altp2m lazily copies pages from the host's p2m and even might
be flushed because of changes to the host's p2m (as it is done within
the context of memory ballooning).
Signed-off-by: Sergej Proskurin
-
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Substituted the call to tlb_flush for p2m_flush_table.
Added comments.
Cosmetic fixes.
v3: Changed the locking mechanism to "p2m_write_lock" inside the
function "altp2m_destroy_by_i
This commit adapts the function "p2m_restore_state" in a way that the
currently active altp2m table is considered during state restoration.
Signed-off-by: Sergej Proskurin
Acked-by: Julien Grall
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3: Moved decl
In this commit, we move the function "altp2m_check" from p2m.c to altp2m.c in
order to group all altp2m-related functions in one point, namely in
altp2m.{c|h}. This commit moves solely the x86 code.
Signed-off-by: Sergej Proskurin
---
Cc: George Dunlap
Cc: Jan Beulich
Cc: Andrew
The HVMOP_altp2m_set_mem_access allows to set gfn permissions of
(currently one page at a time) of a specific altp2m view. In case the
view does not hold the requested gfn entry, it will be first copied from
the host's p2m table and then modified as requested.
Signed-off-by: Sergej Pros
that tracks the vCPUs that are currently using the
particular p2m.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Pages in p2m->pages are not cleared in p2m_flush_table anymore.
VMID is freed in p2m_free_one.
Cosmetic fixes.
v3: Changed the
kes only the vmid that is
to be freed as argument.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3: Changed function prototypes and implementation of the functions
"p2m_alloc_vmid" and "p2m_free_vmid".
Changes in "p2m_alloc_vmid
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Dump p2m information of the hostp2m and all altp2m views.
v4: Adjust printk format.
---
xen/arch/arm/p2m.c | 20
1 file changed, 20 insertions(+)
diff --git a/xen/arch/arm/p2m.c b/xen
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3: Extended the function "altp2m_switch_domain_altp2m_by_id" so that if
the guest domain indirectly calles this function, the current vcpu also
changes the altp2m view without performing an explic
h is
altp2m.c). The reason for modifying the function's name is due the
association of the function with the associated .c file.
Signed-off-by: Sergej Proskurin
---
Cc: Jan Beulich
Cc: Andrew Cooper
Cc: Razvan Cojocaru
Cc: Tamas K Lengyel
Cc: Stefano Stabellini
Cc: Julien Grall
---
v4:
In this commit, we move the function "altp2m_check" from p2m.h to altp2m.h in
order to group all altp2m-related functions in one point, namely in
altp2m.{c|h}. This commit moves solely the arm code.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v4: T
This commit makes sure that the page reference count is updated through
the function "p2m_put_l3_page" only when the entries have been freed
from the host's p2m.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
v4: Moved the check for the
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