On 17/12/14 1:38 am, Julien Grall wrote:
The main goal is to modify as little the Linux code to be able to port
easily new feature added in Linux repo for the driver.
To achieve that we:
- Add helpers to Linux function not implemented on Xen
- Add callbacks used by Xen to do our own s
On 18/02/15 11:52 pm, Julien Grall wrote:
On 18/02/2015 17:30, Jaggi, Manish wrote:
[manish] There are general comments on the data structures
(a) I don't see a use case where for same domain (VM) there would be
different context banks , so linked list may not be required.
I gues
On 19/02/15 1:43 am, Suravee Suthikulanit wrote:
On 2/18/2015 6:48 AM, Julien Grall wrote:
Hi Suravee,
On 18/02/2015 05:28, Suravee Suthikulanit wrote:
Actually, that seems to be more related to the PCI pass-through
devices.
Isn't the Cavium guys already done that work to support their PCI
On 19/02/15 11:31 am, Julien Grall wrote:
On 19/02/2015 02:55, Manish wrote:
On 18/02/15 11:52 pm, Julien Grall wrote:
On 18/02/2015 17:30, Jaggi, Manish wrote:
[manish] There are general comments on the data structures
(a) I don't see a use case where for same domain (VM) there
On 19/02/15 1:44 pm, Jan Beulich wrote:
On 18.02.15 at 21:13, wrote:
On 2/18/2015 6:48 AM, Julien Grall wrote:
Wouldn't it be possible to route the SPI dynamically when the domain
decide to use the MSI n? We would need to implement PHYSDEVOP_map_pirq
for MSI.
Enabling MSI is done by each end
A general comment,
master->of_node is used as a unique value in the rb_tree. In case of
pci_passthrough devices are enumerated and not present in device tree, so I would
have to remove the rb_tree and replace with a linked list.
On 31/01/15 12:19 am, Julien Grall wrote:
The main goal is to mo
+Chales.
Hi Julien,
On 2/27/2017 11:42 PM, Julien Grall wrote:
On 02/27/2017 04:58 PM, Shanker Donthineni wrote:
Hi Julien,
Hi Shanker,
Please don't drop people in CC. In my case, any e-mail I am not CCed
are skipping my inbox and I may not read them for a while.
On 02/27/2017 08:12 AM
Hi Julien,
On 5/18/2017 8:27 PM, Julien Grall wrote:
Hello,
On 18/05/17 12:59, Manish Jaggi wrote:
On 2/27/2017 11:42 PM, Julien Grall wrote:
On 02/27/2017 04:58 PM, Shanker Donthineni wrote:
Hi Julien,
Hi Shanker,
Please don't drop people in CC. In my case, any e-mail I am not CCe
Hi Julien,
On 5/26/2017 10:44 PM, Julien Grall wrote:
Hi all,
The document below is an RFC version of a design proposal for PCI
Passthrough in Xen on ARM. It aims to describe from an high level perspective
the interaction with the different subsystems and how guest will be able
to discover and
Hi Julien,
On 5/29/2017 11:44 PM, Julien Grall wrote:
On 05/29/2017 03:30 AM, Manish Jaggi wrote:
Hi Julien,
Hello Manish,
On 5/26/2017 10:44 PM, Julien Grall wrote:
PCI pass-through allows the guest to receive full control of
physical PCI
devices. This means the guest will have full
This patch is an RFC on top of Andre's v10 series.
https://www.mail-archive.com/xen-devel@lists.xen.org/msg109093.html
This patch deny's access to ITS region for the guest and also updates
the acpi tables for dom0.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3.c
Hi Julien,
On 5/30/2017 4:07 PM, Julien Grall wrote:
Hello Manish,
On 30/05/17 07:07, Manish Jaggi wrote:
This patch is an RFC on top of Andre's v10 series.
https://www.mail-archive.com/xen-devel@lists.xen.org/msg109093.html
This patch deny's access to ITS region for the gues
This patch supports ITS in hardware domain, supports ITS in Xen when
booting with ACPI. Signed-off-by: Manish Jaggi ---
Changes since v1: - Moved its specific code to gic-v3-its.c - fixed
macros xen/arch/arm/domain_build.c | 6 ++-- xen/arch/arm/gic-v3-its.c |
75
On 5/19/2017 1:39 AM, Julien Grall wrote:
On 18/05/2017 21:02, Manish Jaggi wrote:
In the IORT table using the PCI-RC node, SMMU node and ITS node,
RID->StreamID->Device-ID mapping can be generated.
As per IORT spec toady, same RID can be mapped to different StreamIDs
using two ID
This patch disables the smmu node in IORT table for hardware domain.
Also patches the output_base of pci_rc id_array with output_base of
smmu node id_array.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/domain_build.c | 142
+++-
xen/include/acpi
This patch supports ITS in hardware domain, supports ITS in Xen
when booting with ACPI.
Signed-off-by: Manish Jaggi
---
Changes since v1:
- Moved its specific code to gic-v3-its.c
- fixed macros
xen/arch/arm/domain_build.c | 6 ++--
xen/arch/arm/gic-v3-its.c| 75
On 6/8/2017 7:28 PM, Julien Grall wrote:
Hi,
Hello Julien,
Please CC all relevant maintainers.
Sure. Will do in the next patch rev.
On 08/06/17 14:03, Manish Jaggi wrote:
Spurious newline
This patch supports ITS in hardware domain, supports ITS in Xen
when booting with ACPI.
Signed
On 6/8/2017 6:39 PM, Julien Grall wrote:
Hi Manish,
Hi Julien,
On 08/06/17 13:38, Manish Jaggi wrote:
Spurious line.
This patch disables the smmu node in IORT table for hardware domain.
Also patches the output_base of pci_rc id_array with output_base of
smmu node id_array.
I would
HI Julien,
On 6/9/2017 2:53 PM, Julien Grall wrote:
On 09/06/2017 08:13, Manish Jaggi wrote:
On 6/8/2017 6:39 PM, Julien Grall wrote:
Hi Manish,
Hi Julien,
Hello,
On 08/06/17 13:38, Manish Jaggi wrote:
Spurious line.
This patch disables the smmu node in IORT table for hardware
On 6/9/2017 11:11 PM, Andre Przywara wrote:
Hi,
Hi Andre,
Tested this patchset + my acpi ITS patch
(https://lists.xen.org/archives/html/xen-devel/2017-06/msg00716.html) on
our platform and it works.
With v10 was not able to get interrupts. v9 was booting ok.
WBR
-Manish
fixes to v10
On 3/29/2017 5:30 AM, Goel, Sameer wrote:
Sure, I will try to post something soon.
Hi Sameer,
Are you still working on SMMU v3, can you please post patches.
Thanks
Manish
Thanks,
Sameer
On 3/27/2017 11:03 PM, Vijay Kilari wrote:
On Mon, Mar 27, 2017 at 10:00 PM, Goel, Sameer wrote:
Hi
Hi julien,
On 6/9/2017 2:09 PM, Julien Grall wrote:
On 09/06/2017 07:48, Manish Jaggi wrote:
On 6/8/2017 7:28 PM, Julien Grall wrote:
Hi,
Hello Julien,
Hello,
+list_for_each_entry(its_data, &host_its_list, entry)
+{
Pointless {
+size += sizeof(st
On 6/13/2017 4:58 PM, Julien Grall wrote:
On 13/06/17 12:02, Manish Jaggi wrote:
Will the below code be ok?
If you noticed, I didn't say this code is wrong. Instead I asked why
you use the same ID. Meaning, is there anything in the DSDT requiring
this value?
+ int tras_id = 0;
uns
information in hardware domain's MADT table.
Also this patch introduces .get_hwdom_madt_size in gic_hw_operations,
to return the complete size of MADT table for hardware domain.
Manish Jaggi (4):
ARM: ITS: Add translation_id to host_its
ARM: ITS: ACPI: Introduce gicv3_its_acpi_init
ARM: ITS:
This patch adds a translation_id to host_its data structure.
Value stored in this id should be copied over to hardware domains
MADT table.
Signed-off-by: Manish Jaggi
---
xen/include/asm-arm/gic_v3_its.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/xen/include/asm-arm/gic_v3_its.h
b
This patch adds gicv3_its_acpi_init. To avoid duplicate code for
initializing and adding to host_its_list a common function
add_to_host_its_list is added which is called by both _dt_init and
_acpi_init.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 49
This patch extends the gicv3_iomem_deny_access functionality by adding
support
for its region as well. Added function gicv3_its_deny_access.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 19 +++
xen/arch/arm/gic-v3.c| 7 +++
xen/include
This patch adds ITS information in hardware domain's MADT table.
Also this patch introduces .get_hwdom_madt_size in gic_hw_operations,
to return the complete size of MADT table for hardware domain.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/domain_build.c | 7 +--
xen/arch/ar
Hi,
Does Xen arm64 support hugepages for Dom0 ? If yes how to enable it.
Found wiki page on it :
https://wiki.xenproject.org/wiki/Huge_Page_Support but is not updated.
Thanks
-Manish
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passthrough
support / _implementation timelines_ with all concerned people?
-manish
Cheers,
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Hi Andre,
On 10/3/2017 8:03 PM, Julien Grall wrote:
Hi Manish,
On 21/09/17 14:17, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
Add gicv3_its_make_hwdom_madt to update hwdom MADT ITS information.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 19
On 10/10/2017 3:44 PM, Julien Grall wrote:
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS information as well.
This patch updates the formula
support.
* ITS code has been included but it has not been tested.
Could you please refactor this patch into another set of two patches.
I am planning to rebase my IORT for Dom0 Hiding patch rework on this patch.
Thanks,
Manish
Signed-off-by: Sameer Goel
---
xen/arch/arm/setup.c | 3
Hi Julien,
On 10/10/2017 7:09 PM, Julien Grall wrote:
Hi Manish,
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add function gicv3_its_deny_access.
Reviewed-by
On 10/6/2017 7:54 PM, Julien Grall wrote:
Hello,
On 04/10/17 06:22, Manish Jaggi wrote:
On 10/4/2017 12:12 AM, Julien Grall wrote:
On 25/09/17 05:22, Manish Jaggi wrote:
On 9/22/2017 7:42 PM, Andre Przywara wrote:
Hi Manish,
On 11/09/17 22:33, mja...@caviumnetworks.com wrote:
From
ear.
Please provide a technical answer rather than a simple "Why".
Cheers!
Manish
On 10/12/2017 4:34 PM, Julien Grall wrote:
Hello,
On 12/10/17 07:11, Manish Jaggi wrote:
On 10/6/2017 7:54 PM, Julien Grall wrote:
I am not asking to write the DomU support, but at least have a full
sepa
ACPI/IORT Support in Xen.
--
I had sent out patch series [0] to hide smmu from Dom0 IORT. Extending
the scope
and including all that is required to support ACPI/IORT in Xen.
Presenting for review
first _draft_ of design of ACPI/IORT support in Xen. Not compl
On 10/12/2017 5:14 PM, Julien Grall wrote:
On 12/10/17 12:22, Manish Jaggi wrote:
Hi Julien,
Why do you omit parts of mail where I have asked a question , please
avoid skiping that removes the context.
I believe I answered it just after because you asked twice the same
thing. So may I
On 10/19/2017 8:30 PM, Goel, Sameer wrote:
On 10/10/2017 6:36 AM, Manish Jaggi wrote:
Hi Sameer,
On 9/21/2017 6:07 AM, Sameer Goel wrote:
Add support for parsing IORT table to initialize SMMU devices.
* The code for creating an SMMU device has been modified, so that the SMMU
device can be
On 10/23/2017 7:27 PM, Andre Przywara wrote:
Hi Manish,
On 12/10/17 22:03, Manish Jaggi wrote:
ACPI/IORT Support in Xen.
--
I had sent out patch series [0] to hide smmu from Dom0 IORT. Extending
the scope
and including all that is required to support ACPI
On 10/23/2017 8:26 PM, Julien Grall wrote:
Hi,
On 23/10/17 14:57, Andre Przywara wrote:
On 12/10/17 22:03, Manish Jaggi wrote:
It is proposed that the idrange of PCIRC and ITS group be constant for
domUs.
"constant" is a bit confusing here. Maybe "arbitrary"
On 10/27/2017 7:35 PM, Andre Przywara wrote:
Hi,
Hey Andre,
On 25/10/17 09:22, Manish Jaggi wrote:
On 10/23/2017 7:27 PM, Andre Przywara wrote:
Hi Manish,
On 12/10/17 22:03, Manish Jaggi wrote:
ACPI/IORT Support in Xen.
--
I had sent out patch
On 10/31/2017 5:03 AM, Goel, Sameer wrote:
On 10/12/2017 3:03 PM, Manish Jaggi wrote:
ACPI/IORT Support in Xen.
--
I had sent out patch series [0] to hide smmu from Dom0 IORT. Extending the scope
and including all that is required to support ACPI/IORT in
ACPI/IORT Support in Xen.
--
Draft 2
Revision History:
Changes since v1-
- Modified IORT Parsing data structures.
- Added RID->StreamID and RID->DeviceID map as per Andre's suggestion.
- Added reference code which can be read along with this document.
- Removed do
.
[RFC] [Draft Design v2] ACPI/IORT Support in Xen.
https://lists.xen.org/archives/html/xen-devel/2017-11/msg00512.html
I seek your advice on this. Please provide your feedback.
Thanks
Manish
---
xen/arch/arm/setup.c | 3 +
xen/drivers/acpi/Makefile | 1 +
xen/drivers
On 11/14/2017 6:53 PM, Julien Grall wrote:
Hi Manish,
Hey Julien,
On 08/11/17 14:38, Manish Jaggi wrote:
ACPI/IORT Support in Xen.
--
Draft 2
Revision History:
Changes since v1-
- Modified IORT Parsing data structures.
- Added RID->StreamID and RID->De
On 11/16/2017 5:07 PM, Julien Grall wrote:
On 16/11/17 07:39, Manish Jaggi wrote:
On 11/14/2017 6:53 PM, Julien Grall wrote:
3. IORT for Dom0
-
IORT for Dom0 is based on host iort. Few nodes could be removed or
modified.
For instance
- Host SMMU nodes should not be
On 11/16/2017 5:23 PM, Julien Grall wrote:
Hi Manish,
On 16/11/17 11:46, Manish Jaggi wrote:
On 11/16/2017 5:07 PM, Julien Grall wrote:
On 16/11/17 07:39, Manish Jaggi wrote:
On 11/14/2017 6:53 PM, Julien Grall wrote:
3. IORT for Dom0
-
IORT for Dom0 is based on host
ACPI/IORT Support in Xen.
--
Draft 3
Revision History:
Changes since v2:
- Modified as per comments from Julien /Sameer/Andre
Changes since v1:
- Modified IORT Parsing data structures.
- Added RID-StreamID and RID-DeviceID map as per Andre's suggestion.
-
Hi Punit,
On 7/19/2017 8:11 PM, Punit Agrawal wrote:
I took some notes for the PCI Passthrough design discussion at Xen
Summit. Due to the wide range of topics covered, the notes got sparser
towards the end of the session. I've tried to attribute names against
comments but have very likely got t
Hi Roger,
On 7/20/2017 1:54 PM, Roger Pau Monné wrote:
On Thu, Jul 20, 2017 at 09:24:36AM +0530, Manish Jaggi wrote:
Hi Punit,
On 7/19/2017 8:11 PM, Punit Agrawal wrote:
I took some notes for the PCI Passthrough design discussion at Xen
Summit. Due to the wide range of topics covered, the
HI Julien,
On 7/20/2017 4:11 PM, Julien Grall wrote:
On 20/07/17 10:32, Manish Jaggi wrote:
Hi Roger,
On 7/20/2017 1:54 PM, Roger Pau Monné wrote:
On Thu, Jul 20, 2017 at 09:24:36AM +0530, Manish Jaggi wrote:
Hi Punit,
On 7/19/2017 8:11 PM, Punit Agrawal wrote:
I took some notes for the
Hi Roger,
On 7/20/2017 3:59 PM, Roger Pau Monné wrote:
On Thu, Jul 20, 2017 at 03:02:19PM +0530, Manish Jaggi wrote:
Hi Roger,
On 7/20/2017 1:54 PM, Roger Pau Monné wrote:
On Thu, Jul 20, 2017 at 09:24:36AM +0530, Manish Jaggi wrote:
Hi Punit,
On 7/19/2017 8:11 PM, Punit Agrawal wrote:
I
Hi Julien,
On Mon, Jul 17, 2017 at 02:26:22PM +0100, Julien Grall wrote:
This email only tracks big items for xen.git tree. Please reply for items you
woulk like to see in 4.10 so that people have an idea what is going on and
prioritise accordingly.
You're welcome to provide description and use
On 6/13/2017 10:19 AM, Manish Jaggi wrote:
On 3/29/2017 5:30 AM, Goel, Sameer wrote:
Sure, I will try to post something soon.
Hi Sameer,
Are you still working on SMMU v3, can you please post patches.
Hi Sameer,
Could you please post RFC patches for SMMUv3, can provide feedback by
Hi Julien,
On 6/21/2017 6:53 PM, Julien Grall wrote:
Hi Manish,
On 21/06/17 02:01, Manish Jaggi wrote:
This patch series adds the support of ITS for ACPI hardware domain.
It is tested on staging branch with has ITS v12 patchset by Andre.
I have tried to incorporate the review comments on the
Hi Julien,
On 8/10/2017 4:58 PM, Julien Grall wrote:
On 10/08/17 12:21, Manish Jaggi wrote:
Hi Julien,
On 6/21/2017 6:53 PM, Julien Grall wrote:
Hi Manish,
On 21/06/17 02:01, Manish Jaggi wrote:
This patch series adds the support of ITS for ACPI hardware domain.
It is tested on staging
HI Julien,
On 8/10/2017 5:43 PM, Julien Grall wrote:
On 10/08/17 13:00, Manish Jaggi wrote:
Hi Julien,
On 8/10/2017 4:58 PM, Julien Grall wrote:
On 10/08/17 12:21, Manish Jaggi wrote:
Hi Julien,
On 6/21/2017 6:53 PM, Julien Grall wrote:
Hi Manish,
On 21/06/17 02:01, Manish Jaggi
On 8/10/2017 6:44 PM, Julien Grall wrote:
On 08/10/2017 02:00 PM, Manish Jaggi wrote:
HI Julien,
On 8/10/2017 5:43 PM, Julien Grall wrote:
On 10/08/17 13:00, Manish Jaggi wrote:
Hi Julien,
On 8/10/2017 4:58 PM, Julien Grall wrote:
On 10/08/17 12:21, Manish Jaggi wrote:
Hi Julien
This patch adds gicv3_its_acpi_init. To avoid duplicate code for
initializing and adding to host_its_list a common function
add_to_host_its_list is added which is called by both _dt_init and _acpi_init.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 49
This patch adds a translation_id to host_its data structure.
Value stored in this id should be copied over to hardware domains
MADT table.
Signed-off-by: Manish Jaggi
---
xen/include/asm-arm/gic_v3_its.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/xen/include/asm-arm/gic_v3_its.h b
in hardware domain's MADT table.
Also this patch interoduces .get_hwdom_madt_size in gic_hw_operations,
to return the complete size of MADT table for hardware domain.
Manish Jaggi (4):
ARM: ITS: Add translation_id to host_its
ARM: ITS: ACPI: Introduce gicv3_its_acpi_init
ARM: ITS:
This patch adds ITS information in hardware domain's MADT table.
Also this patch interoduces .get_hwdom_madt_size in gic_hw_operations,
to return the complete size of MADT table for hardware domain.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/domain_build.c | 7 +--
xen/arch/ar
This patch extends the gicv3_iomem_deny_access functionality by adding support
for its region as well. Added function gicv3_its_deny_access.
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 19 +++
xen/arch/arm/gic-v3.c| 7 +++
xen/include/asm
This patch adds cavium,smmu-v2 compatible match entry in smmu driver
Signed-off-by: Manish Jaggi
---
xen/drivers/passthrough/arm/smmu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/xen/drivers/passthrough/arm/smmu.c
b/xen/drivers/passthrough/arm/smmu.c
index 1082fcf..887f874 100644
On 9/7/2017 10:27 PM, Andre Przywara wrote:
Hi,
On 05/09/17 18:14, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add function gicv3_its_deny_access.
Signed-off-by: Manish Jaggi
Hi Sameer,
On 9/21/2017 6:07 AM, Sameer Goel wrote:
This change incoporates most of the review comments from [1] and adds the
proposed SMMUv3 driver.
List of changes:
- Introduce the iommu_fwspec implementation - No change from the last RFC
- IORT port from linux. The differences are as under:
Hi Andre,
On 9/22/2017 7:42 PM, Andre Przywara wrote:
Hi Manish,
On 11/09/17 22:33, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
The set is divided into two patches. First one calculates the size of IORT
while second one writes the IORT table itself.
It would be good if you could
Hello Julien,
On 10/4/2017 12:12 AM, Julien Grall wrote:
Hello,
On 25/09/17 05:22, Manish Jaggi wrote:
On 9/22/2017 7:42 PM, Andre Przywara wrote:
Hi Manish,
On 11/09/17 22:33, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
The set is divided into two patches. First one calculates
Hello Julien,
On 10/3/2017 7:17 PM, Julien Grall wrote:
Hi Manish,
On 21/09/17 14:17, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
Added gicv3_its_acpi_init to update host_its_list from MADT table.
For ACPI, host_its structure stores dt_node as NULL.
Signed-off-by: Manish Jaggi
Hi
On 10/3/2017 8:01 PM, Julien Grall wrote:
Hi,
On 21/09/17 14:17, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS information as well.
Introducing gic_get_hwdom_madt_size
-
| PCI Pass-through in Xen ARM |
-
manish.ja...@cavium.com
-
Draft-5
Hi Julien,
On 12/29/2016 07:34 PM, Julien Grall wrote:
> Hi all,
>
> The document below is an early version of a design
> proposal for PCI Passthrough in Xen. It aims to
> describe from an high level perspective the interaction
> with the different subsystems and how guest will be able
> to disco
n.
>
>>
>>
>>> struct physdev_pci_host_bridge_add
>>> {
>>> /* IN */
>>> uint16_t seg;
>>> /* Range of bus supported by the host bridge */
>>> uint8_t bus_start;
>>> uint8_t bus_nr;
>>> uint32_t res0; /* Padding */
>>> /* Information about the configuration space region */
>>> uint64_t cfg_base;
>>> uint64_t cfg_size;
>>> }
>>>
>>> DOM0 will issue the hypercall PHYSDEVOP_pci_host_bridge_add for each host
>>> bridge available on the platform. When Xen is receiving the hypercall, the
>>> the driver associated to the host bridge will be instantiated.
>>
>> I think we should mention the relationship with the existing
>> PHYSDEVOP_pci_mmcfg_reserved hypercall.
[...]
-Manish
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On 01/24/2017 11:13 PM, Julien Grall wrote:
>
>
> On 19/01/17 05:09, Manish Jaggi wrote:
>> Hi Julien,
>
> Hello Manish,
[snip]
>> I think, PCI passthrough and DOM0 w/ACPI enumerating devices on PCI are
>> separate features.
>> Without Xen mapping PC
Hello Julien,
On 01/25/2017 08:55 PM, Julien Grall wrote:
> Hello Manish,
>
> On 25/01/17 04:37, Manish Jaggi wrote:
>> On 01/24/2017 11:13 PM, Julien Grall wrote:
>>>
>>>
>>> On 19/01/17 05:09, Manish Jaggi wrote:
>>>> I think, PCI pass
f_msi_map_rid / iort_msi_map_rid ?
I believe there needs to be set this as requirement on the calle of hypercall.
As sbdf and deviceID returned from msi_map calls might not be same.
>+
>+ return ret;
>+ }
>+
> gdprint
Hi Julien,
On 1/31/2017 6:13 PM, Julien Grall wrote:
>
>
> On 31/01/17 10:29, Jaggi, Manish wrote:
>>>
>>> From: Xen-devel on behalf of Andre
>>> Przywara
>>> Sent: Tuesday, January 31, 2017 12:01 AM
>>> To: Stefano Stabellini; Julien Gral
Hi Julien,
On 1/31/2017 6:13 PM, Julien Grall wrote:
>
>
> On 31/01/17 10:29, Jaggi, Manish wrote:
>>>
>>> From: Xen-devel on behalf of Andre
>>> Przywara
>>> Sent: Tuesday, January 31, 2017 12:01 AM
>>> To: Stefano Stabellini; Julien Gral
Hi Julien,
On 1/31/2017 7:16 PM, Julien Grall wrote:
> On 31/01/17 13:19, Jaggi, Manish wrote:
>> On 1/31/2017 6:13 PM, Julien Grall wrote:
>>> On 31/01/17 10:29, Jaggi, Manish wrote:
>>>>>
>>>>> From: Xen-devel on behalf of Andre
>>>&g
On 1/31/2017 8:47 PM, Julien Grall wrote:
>
>
> On 31/01/17 14:08, Jaggi, Manish wrote:
>> Hi Julien,
>>
>> On 1/31/2017 7:16 PM, Julien Grall wrote:
>>> On 31/01/17 13:19, Jaggi, Manish wrote:
>>>> On 1/31/2017 6:13 PM, Julien Grall wro
d
>or not, so even the current approach (hooking up in platform device)
>seems fragile. We rely on Xen to say "this region cannot be mapped".
>
Why not add support for parsing ACPI tables in Xen, from linux, as we parse
dt.
-manish
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approach
Regards,
Manish Jaggi
From: Julien Grall
Sent: Thursday, December 29, 2016 7:34:15 PM
To: xen-devel; Stefano Stabellini
Cc: Edgar Iglesias (edgar.igles...@xilinx.com); Steve Capper; Punit Agrawal;
Wei Chen; Campbell Sean; Shanker Donthineni; Jiandi An; Jaggi
Hi Julien,
From: Julien Grall
Sent: Thursday, December 29, 2016 10:33 PM
To: Jaggi, Manish; xen-devel; Stefano Stabellini
Cc: Edgar Iglesias (edgar.igles...@xilinx.com); Steve Capper; Punit Agrawal;
Wei Chen; Campbell Sean; Shanker Donthineni; Jiandi An; Roger
PCI Pass-through in Xen ARM
--
Index
1. Background
2. Basic PCI Support in Xen ARM
2.1 pci_hostbridge and pci_hostbridge_ops
2.2 PHYSDEVOP_pci_host_bridge_add hypercall
3. Dom0 Access PCI devices
4. DomU assignment of PCI device
5. NUMA and PCI passthrough
6. DomU pci devi
Hi Ian/Stefano,
As discussed in the call I have sent the design.
Didn't got any feedback on this.
Regards,
Manish Jaggi
From: xen-devel-boun...@lists.xen.org on
behalf of Manish Jaggi
Sent: Monday, June 8, 2015 12:52:55 AM
To: xen-devel@lists.xe
On Tuesday 09 June 2015 08:42 AM, Ian Campbell wrote:
Draft E follows. Also at:
http://xenbits.xen.org/people/ianc/vits/draftE.{pdf,html}
Ian, I have sent a pci passthrough design. It would be good if that can
be linked with this one.
Can I upload the same on xenbits
The major change here ar
On Wednesday 10 June 2015 12:21 PM, Julien Grall wrote:
Hi,
On 10/06/2015 08:45, Ian Campbell wrote:
4. DomU access / assignment PCI device
--
When a device is attached to a domU, provision has to be made such that
it can
access the MMIO space of the device
On Friday 12 June 2015 01:32 AM, Ian Campbell wrote:
On Thu, 2015-06-11 at 14:38 -0700, Manish Jaggi wrote:
On Wednesday 10 June 2015 12:21 PM, Julien Grall wrote:
Hi,
On 10/06/2015 08:45, Ian Campbell wrote:
4. DomU access / assignment PCI device
y used for auto-translated guest.
In the case of x86 PV, the page-table is managed by the guest. The only
things to do is to give the MMIO permission to the guest in order to the
let him use them. This is done at boot time in the toolstack.
Ah yes, makes sense.
Manish, this sort of thing and the
On Tuesday 16 June 2015 10:28 AM, Stefano Stabellini wrote:
On Tue, 16 Jun 2015, Manish Jaggi wrote:
On Tuesday 16 June 2015 09:21 AM, Roger Pau Monné wrote:
El 16/06/15 a les 18.13, Stefano Stabellini ha escrit:
On Thu, 11 Jun 2015, Ian Campbell wrote:
On Thu, 2015-06-11 at 07:25 -0400
On Wednesday 17 June 2015 06:43 AM, Ian Campbell wrote:
On Wed, 2015-06-17 at 13:58 +0100, Stefano Stabellini wrote:
Yes, pciback is already capable of doing that, see
drivers/xen/xen-pciback/conf_space.c
I am not sure if the pci-back driver can query the guest memory map. Is there
an exist
On Wednesday 17 June 2015 07:59 PM, Ian Campbell wrote:
On Wed, 2015-06-17 at 07:14 -0700, Manish Jaggi wrote:
On Wednesday 17 June 2015 06:43 AM, Ian Campbell wrote:
On Wed, 2015-06-17 at 13:58 +0100, Stefano Stabellini wrote:
Yes, pciback is already capable of doing that, see
drivers/xen
On Thursday 25 June 2015 02:41 PM, Ian Campbell wrote:
On Thu, 2015-06-25 at 13:14 +0530, Manish Jaggi wrote:
On Wednesday 17 June 2015 07:59 PM, Ian Campbell wrote:
On Wed, 2015-06-17 at 07:14 -0700, Manish Jaggi wrote:
On Wednesday 17 June 2015 06:43 AM, Ian Campbell wrote:
On Wed, 2015
On Thursday 25 June 2015 10:56 PM, Konrad Rzeszutek Wilk wrote:
On Thu, Jun 25, 2015 at 01:21:28PM +0100, Ian Campbell wrote:
On Thu, 2015-06-25 at 17:29 +0530, Manish Jaggi wrote:
On Thursday 25 June 2015 02:41 PM, Ian Campbell wrote:
On Thu, 2015-06-25 at 13:14 +0530, Manish Jaggi wrote
On Friday 26 June 2015 01:02 PM, Ian Campbell wrote:
On Fri, 2015-06-26 at 07:37 +0530, Manish Jaggi wrote:
On Thursday 25 June 2015 10:56 PM, Konrad Rzeszutek Wilk wrote:
On Thu, Jun 25, 2015 at 01:21:28PM +0100, Ian Campbell wrote:
On Thu, 2015-06-25 at 17:29 +0530, Manish Jaggi wrote
On Friday 26 June 2015 02:39 PM, Ian Campbell wrote:
On Fri, 2015-06-26 at 14:20 +0530, Manish Jaggi wrote:
On Friday 26 June 2015 01:02 PM, Ian Campbell wrote:
On Fri, 2015-06-26 at 07:37 +0530, Manish Jaggi wrote:
On Thursday 25 June 2015 10:56 PM, Konrad Rzeszutek Wilk wrote:
On Thu
PCI Pass-through in Xen ARM
--
Draft 2
Index
1. Background
2. Basic PCI Support in Xen ARM
2.1 pci_hostbridge and pci_hostbridge_ops
2.2 PHYSDEVOP_HOSTBRIDGE_ADD hypercall
3. Dom0 Access PCI devices
4. DomU assignment of PCI device
4.1 Holes in guest memory space
4.2
On Monday 29 June 2015 04:01 PM, Julien Grall wrote:
Hi Manish,
On 28/06/15 19:38, Manish Jaggi wrote:
4.1 Holes in guest memory space
Holes are added in the guest memory space for mapping pci device's BAR
regions.
These are defined in arch-arm.h
/* For
Ian Campbell Wrote:
On Mon, 2015-06-29 at 00:08 +0530, Manish Jaggi wrote:
PCI Pass-through in Xen ARM
--
Draft 2
Index
1. Background
2. Basic PCI Support in Xen ARM
2.1 pci_hostbridge and pci_hostbridge_ops
2.2 PHYSDEVOP_HOSTBRIDGE_ADD hypercall
3. Dom0 Access PCI
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