Ian Jackson writes:
> Markus Armbruster writes ("Re: [Qemu-devel] [PATCH 7/8] os-posix: Provide new
> -runasid option"):
>> The last thing the QEMU command line needs is more exotic options. Are
>> you sure we need a new one here? Can we make existing -runas serve?
>> Precedence: Coreutils[*].
On Tue, Oct 10, 2017 at 12:41:40AM +, Yi Sun wrote:
> On 17-10-09 15:03:25, Roger Pau Monn� wrote:
> > On Sun, Oct 08, 2017 at 04:22:00AM +, Yi Sun wrote:
> [...]
>
> > > static void do_write_psr_msrs(void *data)
> >
> > Should this be "static int do_write_psr_msrs"...
> >
> This functio
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
> From: Manish Jaggi
>
> estimate_acpi_efi_size needs to be updated to provide correct size of
> hardware domains MADT, which now adds ITS information as well.
>
> This patch updates the formula to compute extra MADT size, as per GI
After guest live migration on xen, steal time in /proc/stat
(cpustat[CPUTIME_STEAL]) might decrease because steal returned by
paravirt_steal_clock() might be less than this_rq()->prev_steal_time.
For instance, steal time of each vcpu is 335 before live migration.
cpu 198 0 368 200064 1962 0 0 13
It changes the memebers in 'cos_write_info' to transfer the feature array,
feature properties array and value array. Then, we can write all features
values on the cos id into MSRs.
Because multiple features may co-exist, we need handle all features to write
values of them into a COS register with
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
diff --git a/xen/include/asm-arm/gic_v3_its.h b/xen/include/asm-arm/gic_v3_its.h
index 1fac1c7..e1be33c 100644
--- a/xen/include/asm-arm/gic_v3_its.h
+++ b/xen/include/asm-arm/gic_v3_its.h
@@ -20,6 +20,7 @@
#ifndef __ASM_ARM_ITS_H_
>>> On 10.10.17 at 11:14, wrote:
> --- a/kernel/sched/cputime.c
> +++ b/kernel/sched/cputime.c
> @@ -238,10 +238,17 @@ static __always_inline u64
> steal_account_process_time(u64 maxtime)
> {
> #ifdef CONFIG_PARAVIRT
> if (static_key_false(¶virt_steal_enabled)) {
> - u64 steal
Hi Manish,
I just spotted an issue in this patch.
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add function gicv3_its_deny_access.
Reviewed-by: Andre Przywara
Ack
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS information as well.
This patch updates the formula to compute extra MADT size, as per GICv2/3
by c
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
Add gicv3_its_make_hwdom_madt to update hwdom MADT ITS information.
Reviewed-by: Andre Przywara
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 19 +++
xen/arch/arm/gic-v3
>>> On 06.10.17 at 14:25, wrote:
> --- a/xen/common/grant_table.c
> +++ b/xen/common/grant_table.c
> @@ -3756,14 +3756,13 @@ int mem_sharing_gref_to_gfn(struct grant_table *gt,
> grant_ref_t ref,
> }
> #endif
>
> -int gnttab_map_frame(struct domain *d, unsigned long idx, gfn_t gfn,
> -
On 10/10/2017 3:44 PM, Julien Grall wrote:
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS information as well.
This patch updates the formula t
flight 114197 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114197/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-i386-libvirt6 libvirt-buildfail REGR. vs. 114172
version targeted for testi
Hi,
On 10/10/17 11:33, Manish Jaggi wrote:
On 10/10/2017 3:44 PM, Julien Grall wrote:
Hi Manish,
On 10/10/17 07:16, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS informati
I failed to recognize the need to mirror the changes done by 7869e2bafe
("x86emul/fuzz: add rudimentary limit checking") into the earlier
written but later committed 2fe43d333f ("x86emul: support remaining AVX
insns"): Behavior here is the same as for multi-part reads or writes.
Reported-by: Andre
>>> On 09.10.17 at 12:56, wrote:
> +static void *hvmemul_map_linear_addr(
> +unsigned long linear, unsigned int bytes, uint32_t pfec,
> +struct hvm_emulate_ctxt *hvmemul_ctxt)
> +{
> +struct vcpu *curr = current;
> +void *err, *mapping;
> +unsigned int nr_frames = ((linear + by
(Cc:-ed more gents involved in kernel/sched/cputime.c work. Full patch quoted
below.)
* Dongli Zhang wrote:
> After guest live migration on xen, steal time in /proc/stat
> (cpustat[CPUTIME_STEAL]) might decrease because steal returned by
> paravirt_steal_clock() might be less than this_rq()->p
On Tue, Oct 10, 2017 at 09:19:10AM +, Yi Sun wrote:
> It changes the memebers in 'cos_write_info' to transfer the feature array,
> feature properties array and value array. Then, we can write all features
> values on the cos id into MSRs.
>
> Because multiple features may co-exist, we need han
On Tue, Oct 10, 2017 at 05:14:08PM +0800, Dongli Zhang wrote:
> After guest live migration on xen, steal time in /proc/stat
> (cpustat[CPUTIME_STEAL]) might decrease because steal returned by
> paravirt_steal_clock() might be less than this_rq()->prev_steal_time.
So why not fix paravirt_steal_cloc
> I'd be fine taking care of all the comments while committing (and
> then adding my R-b), provided you (and ideally also Andrew)
> agree, and of course assuming Paul would ack the patch, plus
> no-one else finds yet another problem which once again I may
> have overlooked.
>
Hi Jan,
Thank you fo
The stock compiler in travis doesn't support -fsanitize=undefined.
Signed-off-by: Wei Liu
---
Cc: Doug Goldstein
---
xen/tools/kconfig/allrandom.config | 1 +
1 file changed, 1 insertion(+)
diff --git a/xen/tools/kconfig/allrandom.config
b/xen/tools/kconfig/allrandom.config
index c7753ac4ad..
>>> On 09.10.17 at 19:30, wrote:
> @@ -4568,6 +4571,30 @@ static int do_altp2m_op(
> a.u.set_mem_access.view);
> break;
>
> +case HVMOP_altp2m_set_mem_access_multi:
> +if ( a.u.set_mem_access_multi.pad ||
> + a.u.set_mem_acces
Hi Sameer,
On 9/21/2017 6:07 AM, Sameer Goel wrote:
Add support for parsing IORT table to initialize SMMU devices.
* The code for creating an SMMU device has been modified, so that the SMMU
device can be initialized.
* The NAMED NODE code has been commented out as this will need DOM0 kernel
suppo
On Tue, Oct 10, 2017 at 12:59:26PM +0200, Ingo Molnar wrote:
>
> (Cc:-ed more gents involved in kernel/sched/cputime.c work. Full patch quoted
> below.)
>
> * Dongli Zhang wrote:
>
> > After guest live migration on xen, steal time in /proc/stat
> > (cpustat[CPUTIME_STEAL]) might decrease becau
flight 114267 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114267/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-armhf-armhf-xl 1
On Tue, Oct 10, 2017 at 02:42:01PM +0200, Stanislaw Gruszka wrote:
> > > + u64 steal, steal_time;
> > > + s64 steal_delta;
> > > +
> > > + steal_time = paravirt_steal_clock(smp_processor_id());
> > > + steal = steal_delta = steal_time - this_rq()->prev_steal_time;
>
From: Manish Jaggi
add_to_host_its_list will update the host_its_list. This common
function to be invoked from gicv3_its_dt_init and gic_v3_its_acpi_probe.
Signed-off-by: Manish Jaggi
Reviewed-by: Andre Przywara
Acked-by: Julien Grall
---
xen/arch/arm/gic-v3-its.c | 32 --
From: Manish Jaggi
Added gicv3_its_acpi_init to update host_its_list from MADT table.
For ACPI, host_its structure stores dt_node as NULL.
Reviewed-by: Andre Przywara
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 24
xen/arch/arm/gic-v3.c
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add function gicv3_its_deny_access.
Reviewed-by: Andre Przywara
Acked-by: Julien Grall
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 22 +
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS information as well.
This patch updates the formula to compute extra MADT size, as per GICv2/3
by calling gic_get_hwdom_extra_madt_size.
Signed-off-by: Manish Jaggi
From: Manish Jaggi
Add gicv3_its_make_hwdom_madt to update hwdom MADT ITS information.
Reviewed-by: Andre Przywara
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 19 +++
xen/arch/arm/gic-v3.c| 2 ++
xen/include/asm-arm/gic_v3_its.h | 8 +++
From: Manish Jaggi
This patch is split into 5 patches. First two add support for updating
host_its_list from ACPI MADT table.
The rest patches provide support to update the hardware domain MADT table
with ITS information.
Changes since v5
- fixed indentation
- fixed return value check of gicv3_i
flight 114194 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114194/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-xsm broken
test-armhf-armhf-xl-credit2
On 10/08/2017 10:58 PM, Zhenzhong Duan wrote:
> As xen_cpuhp_setup is called by PV and PVHVM, the name of "x86/xen/hvm_guest"
> is confusing.
>
> Signed-off-by: Zhenzhong Duan
Reviewed-by: Boris Ostrovsky
Applied to for-linus-4.14c.
-boris
___
Xen
Hi Manish,
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add function gicv3_its_deny_access.
Reviewed-by: Andre Przywara
Acked-by: Julien Grall
Please state afte
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
Added gicv3_its_acpi_init to update host_its_list from MADT table.
For ACPI, host_its structure stores dt_node as NULL.
Reviewed-by: Andre Przywara
Signed-off-by: Manish Jaggi
Acked-by: Julien Grall
Cheers,
--
Juli
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
estimate_acpi_efi_size needs to be updated to provide correct size of
hardware domains MADT, which now adds ITS information as well.
This patch updates the formula to compute extra MADT size, as per GICv2/3
by calling gic_g
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
Add gicv3_its_make_hwdom_madt to update hwdom MADT ITS information.
Reviewed-by: Andre Przywara
Usually *-by are order from the oldest first to the earlier. This mean
your Signed-off-by is first.
Signed-off-by: Manis
Hi Julien,
On 10/10/2017 7:09 PM, Julien Grall wrote:
Hi Manish,
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add function gicv3_its_deny_access.
Reviewed-by: And
On 10/10/17 14:53, Manish Jaggi wrote:
Hi Julien,
On 10/10/2017 7:09 PM, Julien Grall wrote:
Hi Manish,
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch extends the gicv3_iomem_deny_access functionality by adding
support for ITS region as well. Add functio
On Tue, 2017-10-10 at 14:48 +0200, Peter Zijlstra wrote:
> On Tue, Oct 10, 2017 at 02:42:01PM +0200, Stanislaw Gruszka wrote:
> > > > + u64 steal, steal_time;
> > > > + s64 steal_delta;
> > > > +
> > > > + steal_time =
> > > > paravirt_steal_clock(smp_proce
On Ma, 2017-10-10 at 06:28 -0600, Jan Beulich wrote:> >
> > >
> > > >
> > > > a.u.set_mem_access_multi.pfn_list,
> > + a.u.set_mem_access_multi.acc
> > ess_list,
> > + a.u.set_mem_access_multi.nr,
> > +
>>> On 10.10.17 at 16:13, wrote:
> On Ma, 2017-10-10 at 06:28 -0600, Jan Beulich wrote:> >
>> > >
>> > > >
>> > > > a.u.set_mem_access_multi.pfn_list,
>> > + a.u.set_mem_access_multi.acc
>> > ess_list,
>> > + a.u.set_mem_
>>> On 10.10.17 at 11:19, wrote:
> --- a/xen/arch/x86/psr.c
> +++ b/xen/arch/x86/psr.c
> @@ -,25 +,47 @@ static unsigned int get_socket_cpu(unsigned int
> socket)
> struct cos_write_info
> {
> unsigned int cos;
> -struct feat_node *feature;
> +struct feat_node **features;
>>> On 08.10.17 at 09:23, wrote:
> --- a/xen/arch/x86/domctl.c
> +++ b/xen/arch/x86/domctl.c
> @@ -1438,67 +1438,66 @@ long arch_do_domctl(
> }
> break;
>
> -case XEN_DOMCTL_psr_cat_op:
> -switch ( domctl->u.psr_cat_op.cmd )
> +case XEN_DOMCTL_psr_alloc:
> +#def
>>> On 08.10.17 at 09:23, wrote:
> This patch refines psr codes:
> 1. Change type of 'cat_init_feature' to 'bool' to remove the pointless
>returning of error code.
> 2. Move printk in 'cat_init_feature' to reduce a return path.
> 3. Define a local variable 'feat_mask' in 'psr_cpu_init' to redu
Hi,
We are migrating from xen 4.4 to xen 4.8. At the moment we boot our
system with a xen command line that includes
"dom0_mem=8192m,min:1728m,max:8192m". We have autoballoon of dom0
disabled in xl.conf and instead call xl mem-set 0 to
change the dom0 memory allocation. (We shrink before
Hi,
On 10/10/17 13:52, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
This patch is split into 5 patches. First two add support for updating
host_its_list from ACPI MADT table.
The rest patches provide support to update the hardware domain MADT table
with ITS information.
Stefano, this
Hi,
On 09/10/17 21:32, Stefano Stabellini wrote:
On Fri, 6 Oct 2017, Julien Grall wrote:
Hi Volodymyr,
On 04/10/17 22:00, Volodymyr Babchuk wrote:
PSCI handling code had helper routine that checked calling convention.
It does not needed anymore, because:
- Generic handler checks that 64 b
Hi,
On 04/10/17 22:00, Volodymyr Babchuk wrote:
PSCI handling code had helper routine that checked calling convention.
It does not needed anymore, because:
- Generic handler checks that 64 bit calls can be made only by
64 bit guests.
- SMCCC requires that 64-bit handler should support
Hi,
On 09/10/17 10:40, George Dunlap wrote:
On 10/05/2017 03:50 PM, Volodymyr Babchuk wrote:
Hi Konrad,
On 05.10.17 16:03, Konrad Rzeszutek Wilk wrote:
On Thu, Oct 05, 2017 at 12:00:20AM +0300, Volodymyr Babchuk wrote:
Added type xen_uuid_t. This type represents UUID as an array of 16
bytes
The function get_ipa_output_size is check whether the input size
configured by the guest is valid and will return it.
The check is done with the IPS already shifted against
TCR_EL1_IPS_48_BIT. However the constant has been defined with the
shift included, resulting the check always been false.
Fi
Hi Julien,
On 10.10.17 18:19, Julien Grall wrote:
Hi,
On 09/10/17 10:40, George Dunlap wrote:
On 10/05/2017 03:50 PM, Volodymyr Babchuk wrote:
Hi Konrad,
On 05.10.17 16:03, Konrad Rzeszutek Wilk wrote:
On Thu, Oct 05, 2017 at 12:00:20AM +0300, Volodymyr Babchuk wrote:
Added type xen_uuid_t
>>> On 08.10.17 at 09:23, wrote:
> This patch implements main data structures of MBA.
>
> Like CAT features, MBA HW info has cos_max which means the max thrtl
> register number, and thrtl_max which means the max throttle value
> (delay value). It also has a flag to represent if the throttle
> val
According to SMCCC (ARM DEN 0028B, page 12), function id is
stored in least 32 bits of r0/x0 register:
The least significant 32-bits are used, and the most significant
32-bits are zero.
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
* Removed part of the quote from ARM DEN
Hello all,
v8:
* Added `R-b` and `A-b` tags
* Minor changes in commit messages
* PSCI_ARG32 replaced with (uint32_t)get_user_reg(regs, 0) in
handle_sssc() function
---
v7:
* Added new patch "arm: traps: use only least 32 bits of fid in PSCI handler"
It fixes fid usage on 64 bit machin
Trapped SMC instruction can fail condition check on ARMv8 architecture
(ARM DDI 0487B.a page D7-2271). So we need to check if condition was meet.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
xen/arch/arm/traps.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/xen/arc
There are standard functions set_user_reg() and get_user_reg(). We can
use them in PSCI_SET_RESULT()/PSCI_ARG() macros instead of relying on
CONFIG_ARM_64 definition.
Signed-off-by: Volodymyr Babchuk
Reviewed-by: Julien Grall
---
xen/arch/arm/traps.c | 38 +-
On Mon, Oct 09, 2017 at 05:28:08PM +0100, Ian Jackson wrote:
> Ian Jackson writes ("[PATCH 1/8] xen: link against xentoolcore"):
> > From: Anthony PERARD
> >
> > Xen libraries 4.10 will include a new xentoolcore library, without
> > which xendevicemodel et al will not work.
>
> The xentoolcore l
This patch defines HSR_XXC_IMM_MASK. It can be used to extract
immediate value for trapped HVC32, HVC64, SMC64, SVC32, SVC64
instructions, as described in the ARM ARM
(ARM DDI 0487B.a pages D7-2270, D7-2272).
Signed-off-by: Volodymyr Babchuk
Acked-by: Julien Grall
---
xen/include/asm-arm/proces
Added type xen_uuid_t. This type represents UUID as an array of 16
bytes in big endian format.
Added macro XEN_DEFINE_UUID that constructs UUID in the usual way:
XEN_DEFINE_UUID(0x00112233, 0x4455, 0x6677, 0x8899,
0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff)
will construct UUID 00112233-
Add generic definitions used in ARM SMC call convention.
Those definitions was originally added to Linux kernel as
include/linux/arm-smccc.h by commit 98dd64f34f47
("ARM: 8478/2: arm/arm64: add arm-smccc")
I extended them and formatted according to XEN coding style. Some
of the macros were convert
SMCCC (SMC Call Convention) describes how to handle both HVCs and SMCs.
SMCCC states that both HVC and SMC are valid conduits to call to different
firmware functions. Thus, for example, PSCI calls can be made both by
SMC or HVC. Also SMCCC defines function number coding for such calls.
Besides func
smccc.h provides definitions to construct SMC call function number according
to SMCCC. We don't need multiple definitions for one thing, and definitions
in smccc.h are more generic than ones used in psci.h.
So psci.h will only provide function codes, while whole SMC function
identifier will be con
This feature indicates that hypervisor is compatible with ARM
SMC calling convention. Previously hypervisor would inject an
undefined instruction exception if an invalid SMC function were
called or would crash a domain if an invalid HVC function
were invoked.
XENFEAT_ARM_SMCCC_supported feature mea
PSCI handling code had helper routine that checked calling convention.
It does not needed anymore, because:
- Generic handler checks that 64 bit calls can be made only by
64 bit guests.
- SMCCC requires that 64-bit handler should support both 32 and 64 bit
calls even if they originate fro
PSCI is part of HVC/SMC interface, so it should be handled in
appropriate place: `vsmc.c`. This patch moves PSCI handler
calls from `traps.c` to `vsmc.c`. Also it corrects coding
style of the PSCI handler functions.
Older PSCI 0.1 uses SMC function identifiers in range that is
reserved for existin
On Tue, Sep 12, 2017 at 11:15:09AM +0800, Haozhong Zhang wrote:
> On 09/11/17 11:52 -0700, Stefano Stabellini wrote:
> > CC'ing xen-devel, and the Xen tools and x86 maintainers.
> >
> > On Mon, 11 Sep 2017, Igor Mammedov wrote:
> > > On Mon, 11 Sep 2017 12:41:47 +0800
> > > Haozhong Zhang wrote:
>>> On 10.10.17 at 17:52, wrote:
> --- a/xen/include/public/xen.h
> +++ b/xen/include/public/xen.h
> @@ -930,6 +930,39 @@ __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
> __DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
> __DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t);
>
> +typedef struct
> +{
Please
On 10/10/17 4:15 AM, Wei Liu wrote:
> The stock compiler in travis doesn't support -fsanitize=undefined.
>
> Signed-off-by: Wei Liu
> ---
> Cc: Doug Goldstein
> ---
> xen/tools/kconfig/allrandom.config | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/xen/tools/kconfig/allrandom.config
Hi Julien,
On 10/10/2017 05:20 PM, Julien Grall wrote:
> The function get_ipa_output_size is check whether the input size
> configured by the guest is valid and will return it.
>
> The check is done with the IPS already shifted against
> TCR_EL1_IPS_48_BIT. However the constant has been defined w
On Mon, Jul 24, 2017 at 9:54 AM, Kyle Huey wrote:
> On Mon, Jul 24, 2017 at 8:07 AM, Boris Ostrovsky
> wrote:
>>
One thing I noticed is that the workaround doesn't appear to be
complete: it is only checking PMC0 status and not other counters (fixed
or architectural). Of course, wit
flight 114204 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114204/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-pvh-intel 12 guest-start fail like 114169
test-amd64-amd64-xl-pvh-amd 12 gues
Hi all,
Quick reminder, the code freeze is tomorrow (Wednesday).
Please check-in everything by end of the day tomorrow. An RC will be cut
on we get a push.
Cheers,
On 26/09/17 16:22, Julien Grall wrote:
Hi all,
The hard code freeze date will be extended by a week and half. I still
expect
On Wed, Oct 04, 2017 at 08:34:13AM +, Jan Beulich wrote:
> >>> On 19.09.17 at 17:29, wrote:
> > +static void vpci_msi_enable(const struct pci_dev *pdev, struct vpci_msi
> > *msi,
> > +unsigned int vectors)
> > +{
> > +int ret;
> > +
> > +ASSERT(!msi->enable
Hello Jan,
On 10.10.17 19:12, Jan Beulich wrote:
On 10.10.17 at 17:52, wrote:
--- a/xen/include/public/xen.h
+++ b/xen/include/public/xen.h
@@ -930,6 +930,39 @@ __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
__DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
__DEFINE_XEN_GUEST_HANDLE(uint64, uint6
flight 72223 distros-debian-snapshot real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/72223/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-arm64-arm64-armhf-daily-netboot-pygrub 1 build-check(1) blocked n/a
build-arm64-pvops
On Mon, Oct 09, 2017 at 05:58:17PM +0100, Ian Jackson wrote:
> (My resend has crossed with your review. Sorry about that.)
>
> Anthony PERARD writes ("Re: [PATCH 3/8] xen: defer call to xen_restrict until
> after os_setup_post"):
> > On Wed, Oct 04, 2017 at 05:18:06PM +0100, Ian Jackson wrote:
>
On Mon, Oct 09, 2017 at 04:57:06PM +0100, Ian Jackson wrote:
> In practice, qemu opens a great many fds. Tracking them all down and
> playing whack-a-mole is unattractive. It is also potentially fragile
> in that future changes might accidentally undo our efforts.
>
> Instead, we are going to te
On 10/10/2017 05:24 PM, Jan Beulich wrote:
On 10.10.17 at 16:13, wrote:
>> On Ma, 2017-10-10 at 06:28 -0600, Jan Beulich wrote:> >
>
>>
>> a.u.set_mem_access_multi.pfn_list,
+ a.u.set_mem_access_multi.acc
ess_list,
+
On Mon, Oct 09, 2017 at 05:01:36PM +0100, Ian Jackson wrote:
> And insist that it works.
>
> Drop individual use of xendevicemodel_restrict and
> xenforeignmemory_restrict. These are not actually effective in this
> version of qemu, because qemu has a large number of fds open onto
> various Xen c
flight 114224 seabios real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114224/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-xl-qemuu-win7-amd64 17 guest-stopfail like 114103
test-amd64-amd64-xl-qemuu-ws16-amd64 10 w
Added type xen_uuid_t. This type represents UUID as an array of 16
bytes in big endian format.
Added macro XEN_DEFINE_UUID that constructs UUID in the usual way:
XEN_DEFINE_UUID(0x00112233, 0x4455, 0x6677, 0x8899,
0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff)
will construct UUID 00112233
On Tue, 10 Oct 2017, mja...@caviumnetworks.com wrote:
> From: Manish Jaggi
>
> Add gicv3_its_make_hwdom_madt to update hwdom MADT ITS information.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Manish Jaggi
> ---
> xen/arch/arm/gic-v3-its.c| 19 +++
> xen/arch/arm/gi
On Mon, Oct 09, 2017 at 05:01:37PM +0100, Ian Jackson wrote:
> We need to restrict *all* the control fds that qemu opens. Looking in
> /proc/PID/fd shows there are many; their allocation seems scattered
> throughout Xen support code in qemu.
>
> We must postpone the restrict call until roughly th
On Mon, Oct 09, 2017 at 05:01:39PM +0100, Ian Jackson wrote:
> We are going to want to use the dummy xendevicemodel_handle type in
> new stub functions in the CONFIG_XEN_CTRL_INTERFACE_VERSION < 41000
> section. So we need to provide that definition, or (as applicable)
> include the appropriate he
Hi,
On 10/10/2017 20:15, Stefano Stabellini wrote:
On Tue, 10 Oct 2017, mja...@caviumnetworks.com wrote:
From: Manish Jaggi
Add gicv3_its_make_hwdom_madt to update hwdom MADT ITS information.
Reviewed-by: Andre Przywara
Signed-off-by: Manish Jaggi
---
xen/arch/arm/gic-v3-its.c| 19
On Mon, Oct 09, 2017 at 05:01:40PM +0100, Ian Jackson wrote:
> xc_interface_open etc. is not going to work if we have dropped
> privilege, but xendevicemodel_shutdown will if everything is new
> enough.
>
> xendevicemodel_shutdown is only availabe in Xen 4.10 and later, so
> provide a stub for ear
CC'ing Jan and Andrew, just in case they disagree on this.
On Tue, 10 Oct 2017, Julien Grall wrote:
> > > +unsigned long gicv3_its_make_hwdom_madt(const struct domain *d, void
> > > *base_ptr)
> > > +{
> > > +unsigned int i;
> > > +void *fw_its;
> > > +struct acpi_madt_generic_translat
flight 114218 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114218/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemut-stubdom-debianhvm-amd64-xsm 15 guest-saverestore.2
fail REGR. vs. 114175
Hi,
On 10/10/2017 21:07, Stefano Stabellini wrote:
CC'ing Jan and Andrew, just in case they disagree on this.
On Tue, 10 Oct 2017, Julien Grall wrote:
+unsigned long gicv3_its_make_hwdom_madt(const struct domain *d, void
*base_ptr)
+{
+unsigned int i;
+void *fw_its;
+struct acpi_ma
On 10/10/17 13:01, Alexandru Stefan ISAILA wrote:
>> I'd be fine taking care of all the comments while committing (and
>> then adding my R-b), provided you (and ideally also Andrew)
>> agree, and of course assuming Paul would ack the patch, plus
>> no-one else finds yet another problem which once a
flight 114289 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/114289/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 13 migrate-support-checkfail never pass
test-armhf-armhf-xl 1
On 10/09/2017 05:12 PM, Jan Beulich wrote:
On 09.10.17 at 17:36, wrote:
>> On 09/14/2017 04:12 PM, Jan Beulich wrote:
>>> @@ -7119,6 +7142,18 @@ x86_emulate(
>>> fic.insn_bytes = PFX_BYTES + 3;
>>> break;
>>>
>>> +case X86EMUL_OPC_VEX_66(0x0f38, 0x19): /* vbroadcastsd
On Mon, 9 Oct 2017, Julien Grall wrote:
> This is based on the Linux ARMv8 naming scheme (see arch/arm64/mm/proc.S).
> Each
> type will contain "NORMAL" or "DEVICE" to make clear whether each attribute
> targets device or normal memory.
>
> Signed-off-by: Julien Grall
Reviewed-by: Stefano Stabe
On Mon, 9 Oct 2017, Julien Grall wrote:
> Currently, it is not possible to specify the permission of a new
> mapping. It would be necessary to use the function modify_xen_mappings
> with a different set of flags.
>
> Introduce a couple of new flags for the permissions (Non-eXecutable,
> Read-Only)
On Mon, 9 Oct 2017, Julien Grall wrote:
> Currently, all the new mappings will be read-write non-executable. Allow the
> caller to use other permissions.
>
> Signed-off-by: Julien Grall
Reviewed-by: Stefano Stabellini
> ---
> Changes in v2:
> - Switch the runtime check to a BUG_ON(
On Mon, 9 Oct 2017, Julien Grall wrote:
> At the moment, PAGE_HYPERVISOR_* and MT_* have exactly the same value.
> In a follow-up patch the former will be extended to carry more
> information.
>
> It looks like the caller of set_fixmap are mixing the both. Stay
> consistent and only use PAGE_HYPER
On 10/06/2017 02:19 PM, Paul Durrant wrote:
-Original Message-
From: Xen-devel [mailto:xen-devel-boun...@lists.xen.org] On Behalf Of
Ross Lagerwall
Sent: 06 October 2017 13:58
To: Ian Jackson ; qemu-de...@nongnu.org
Cc: Anthony Perard ; xen-
de...@lists.xenproject.org; Stefano Stabellini
On Mon, 9 Oct 2017, Julien Grall wrote:
> Hi all,
>
> This patch series contains clean-up for the ARM memory subsystem in
> preparation
> of reworking the page tables handling.
>
> For all changes, see in each patch.
The series is committed, thanks!
> Cheers,
>
> Julien Grall (10):
> xen/a
1 - 100 of 190 matches
Mail list logo
