[Xen-devel] [PATCH v3] boot allocator: Use arch helper for virt_to_mfn on DIRECTMAP

2017-03-27 Thread vijay . kilari
From: Vijaya Kumar K On ARM64, virt_to_mfn uses the hardware for address translation. So if the virtual address is not mapped translation fault is raised. On ARM64, DIRECTMAP_VIRT region is direct mapped. On ARM platforms with NUMA, While initializing second memory node, panic is triggered from

Re: [Xen-devel] [PATCH v9 03/25] x86: refactor psr: implement main data structures.

2017-03-27 Thread Yi Sun
On 17-03-27 00:20:58, Jan Beulich wrote: > >>> On 27.03.17 at 04:38, wrote: > > On 17-03-24 10:19:30, Jan Beulich wrote: > >> >>> On 16.03.17 at 12:07, wrote: > >> > +struct psr_cat_hw_info { > >> > +unsigned int cbm_len; > >> > +unsigned int cos_max; > >> > >> So you have this field, an

Re: [Xen-devel] [PATCH v3] boot allocator: Use arch helper for virt_to_mfn on DIRECTMAP

2017-03-27 Thread Jan Beulich
>>> On 27.03.17 at 09:10, wrote: > @@ -254,7 +262,6 @@ static inline int gvirt_to_maddr(vaddr_t va, paddr_t *pa, > unsigned int flags) > #define virt_to_mfn(va) (virt_to_maddr(va) >> PAGE_SHIFT) > #define mfn_to_virt(mfn) (maddr_to_virt((paddr_t)(mfn) << PAGE_SHIFT)) > > - > /* Convert be

Re: [Xen-devel] [PATCH v3] boot allocator: Use arch helper for virt_to_mfn on DIRECTMAP

2017-03-27 Thread Vijay Kilari
Hi Jan, Thanks for the review. On Mon, Mar 27, 2017 at 12:50 PM, Jan Beulich wrote: On 27.03.17 at 09:10, wrote: >> @@ -254,7 +262,6 @@ static inline int gvirt_to_maddr(vaddr_t va, paddr_t >> *pa, unsigned int flags) >> #define virt_to_mfn(va) (virt_to_maddr(va) >> PAGE_SHIFT) >> #d

Re: [Xen-devel] [PATCH v9 03/25] x86: refactor psr: implement main data structures.

2017-03-27 Thread Jan Beulich
>>> On 27.03.17 at 09:12, wrote: > On 17-03-27 00:20:58, Jan Beulich wrote: >> >>> On 27.03.17 at 04:38, wrote: >> > On 17-03-24 10:19:30, Jan Beulich wrote: >> >> >>> On 16.03.17 at 12:07, wrote: >> >> > +struct psr_cat_hw_info { >> >> > +unsigned int cbm_len; >> >> > +unsigned int cos_

[Xen-devel] [PATCH v2] configure: use pkg-config for obtaining xen version

2017-03-27 Thread Juergen Gross
Instead of trying to guess the Xen version to use by compiling various test programs first just ask the system via pkg-config. Only if it can't return the version fall back to the test program scheme. If configure is being called with dedicated flags for the Xen libraries use those instead of the

Re: [Xen-devel] Legacy PCI interrupt {de}assertion count

2017-03-27 Thread Jan Beulich
>>> On 24.03.17 at 17:54, wrote: > As I understand it, for level triggered legacy PCI interrupts Xen sets up a > timer in order to perform the EOI if the guest takes too long in deasserting > the line. This is done in pt_irq_time_out. What I don't understand is why this > function also does a deas

Re: [Xen-devel] [Qemu-devel] [PATCH RESEND] xen: limit pkg-config to PKG_CONFIG_PATH for xen libraries

2017-03-27 Thread Paul Durrant
> -Original Message- [snip] > > To sum it up we have to care about the following scenarios: > > a) Xen in-tree build, Xen >= 4.9 > b) Xen in-tree build, Xen < 4.9 > c) build out-of-Xen-tree > > combined with any of: > > 1) no Xen installed on build machine > 2) Xen >= 4.9 installed > 3)

Re: [Xen-devel] [PATCH] tools/libxenforeignmemory: add a call to restrict the handle

2017-03-27 Thread Paul Durrant
> -Original Message- > From: Xen-devel [mailto:xen-devel-boun...@lists.xen.org] On Behalf Of > Paul Durrant > Sent: 24 March 2017 20:24 > To: Andrew Cooper ; xen- > de...@lists.xenproject.org > Cc: Ian Jackson ; Julien Grall > ; Wei Liu > Subject: Re: [Xen-devel] [PATCH] tools/libxenforeig

Re: [Xen-devel] [PATCH v9 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow.

2017-03-27 Thread Yi Sun
On 17-03-27 00:34:29, Jan Beulich wrote: > >>> On 27.03.17 at 06:41, wrote: > > On 17-03-24 10:52:34, Jan Beulich wrote: > >> >>> On 16.03.17 at 12:07, wrote: > >> > @@ -46,6 +50,9 @@ > >> > */ > >> > #define MAX_COS_REG_CNT 128 > >> > > >> > +/* CAT features use 1 COS register in one acces

Re: [Xen-devel] [PATCH] tools/libxenforeignmemory: add a call to restrict the handle

2017-03-27 Thread Andrew Cooper
On 27/03/2017 09:06, Paul Durrant wrote: >> -Original Message- >> From: Xen-devel [mailto:xen-devel-boun...@lists.xen.org] On Behalf Of >> Paul Durrant >> Sent: 24 March 2017 20:24 >> To: Andrew Cooper ; xen- >> de...@lists.xenproject.org >> Cc: Ian Jackson ; Julien Grall >> ; Wei Liu >> S

Re: [Xen-devel] [PATCH] tools/libxenforeignmemory: add a call to restrict the handle

2017-03-27 Thread Paul Durrant
> -Original Message- > From: Andrew Cooper [mailto:am...@hermes.cam.ac.uk] On Behalf Of > Andrew Cooper > Sent: 27 March 2017 09:16 > To: Paul Durrant ; xen-de...@lists.xenproject.org > Cc: Ian Jackson ; Julien Grall > ; Wei Liu > Subject: Re: [Xen-devel] [PATCH] tools/libxenforeignmemory:

[Xen-devel] [PATCH v3] xen/arm: alternative: Register re-mapped Xen area as a temporary virtual region

2017-03-27 Thread Wei Chen
While I was using the alternative patching in the SErrors patch series [1]. I used a branch instruction as alternative instruction. ALTERNATIVE("nop", "b skip_check", SKIP_CHECK_PENDING_VSERROR) Unfortunately, I got a system panic message with this

Re: [Xen-devel] [PATCH v2 16/27] ARM: vITS: handle CLEAR command

2017-03-27 Thread Andre Przywara
Hi, On 24/03/17 17:17, Stefano Stabellini wrote: > On Fri, 24 Mar 2017, Andre Przywara wrote: >> Hi, >> >> On 24/03/17 14:27, Julien Grall wrote: >>> Hi Andre, >>> >>> On 03/16/2017 11:20 AM, Andre Przywara wrote: This introduces the ITS command handler for the CLEAR command, which clear

Re: [Xen-devel] [PATCH v9 05/25] x86: refactor psr: L3 CAT: implement CPU init and free flow.

2017-03-27 Thread Jan Beulich
>>> On 27.03.17 at 10:16, wrote: > On 17-03-27 00:34:29, Jan Beulich wrote: >> >>> On 27.03.17 at 06:41, wrote: >> > On 17-03-24 10:52:34, Jan Beulich wrote: >> >> >>> On 16.03.17 at 12:07, wrote: >> >> > @@ -46,6 +50,9 @@ >> >> > */ >> >> > #define MAX_COS_REG_CNT 128 >> >> > >> >> > +/*

Re: [Xen-devel] [PATCH V8 1/3] irq: Add flags to request_percpu_irq function

2017-03-27 Thread Andrew Jones
On Thu, Mar 23, 2017 at 06:42:01PM +0100, Daniel Lezcano wrote: > diff --git a/drivers/clocksource/timer-nps.c b/drivers/clocksource/timer-nps.c > index da1f798..dbdb622 100644 > --- a/drivers/clocksource/timer-nps.c > +++ b/drivers/clocksource/timer-nps.c > @@ -256,7 +256,7 @@ static int __init np

Re: [Xen-devel] [PATCH v2 09/27] ARM: GICv3: introduce separate pending_irq structs for LPIs

2017-03-27 Thread Andre Przywara
Hi, On 24/03/17 17:26, Stefano Stabellini wrote: > On Fri, 24 Mar 2017, Andre Przywara wrote: +struct pending_irq *lpi_to_pending(struct vcpu *v, unsigned int lpi, + bool allocate) +{ +struct lpi_pending_irq *lpi_irq, *empty = NULL; +

Re: [Xen-devel] [PATCH] tracing: xenalyze: kill spurious ", " in Credit1 traces.

2017-03-27 Thread George Dunlap
On 21/02/17 11:56, Dario Faggioli wrote: > Signed-off-by: Dario Faggioli Acked-by: George Dunlap > --- > Cc: George Dunlap > Cc: Ian Jackson > Cc: Wei Liu > --- > tools/xentrace/xenalyze.c |2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/xentrace/xenalyze.c

[Xen-devel] [libvirt test] 106931: regressions - FAIL

2017-03-27 Thread osstest service owner
flight 106931 libvirt real [real] http://logs.test-lab.xenproject.org/osstest/logs/106931/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: build-armhf-libvirt 5 libvirt-buildfail REGR. vs. 106829 Tests which did not suc

Re: [Xen-devel] [PATCH v2] configure: use pkg-config for obtaining xen version

2017-03-27 Thread Paul Durrant
> -Original Message- > From: Juergen Gross [mailto:jgr...@suse.com] > Sent: 27 March 2017 08:43 > To: qemu-de...@nongnu.org; xen-de...@lists.xenproject.org > Cc: Anthony Perard ; kra...@redhat.com; > sstabell...@kernel.org; Paul Durrant ; Juergen > Gross > Subject: [PATCH v2] configure: us

[Xen-devel] [PATCH RFC 05/20] libxc/xc_sr: factor out filter_pages()

2017-03-27 Thread Joshua Otto
When processing a PAGE_DATA record, the restore side needs to set the types of incoming pages using the appropriate restore op and filter the list of pfns in the record to the subset that are 'backed' - ie. accompanied by real backing data in the stream that needs to be filled in. Both of these st

[Xen-devel] [PATCH RFC 01/20] tools: rename COLO 'postcopy' to 'aftercopy'

2017-03-27 Thread Joshua Otto
The COLO xc domain save and restore procedures both make use of a 'postcopy' callback to defer part of each checkpoint operation to xl. In this context, the name 'postcopy' is meant as "the callback invoked immediately after this checkpoint's memory callback." This is an unfortunate name collisio

Re: [Xen-devel] [PATCH v9 07/25] x86: refactor psr: L3 CAT: implement get hw info flow.

2017-03-27 Thread Jan Beulich
>>> On 16.03.17 at 12:07, wrote: > +static enum psr_feat_type psr_cbm_type_to_feat_type(enum cbm_type type) > +{ > +enum psr_feat_type feat_type; > + > +switch ( type ) > +{ > +case PSR_CBM_TYPE_L3: > +feat_type = PSR_SOCKET_L3_CAT; > +break; > +default: > +

[Xen-devel] [PATCH RFC 00/20] Add postcopy live migration support

2017-03-27 Thread Joshua Otto
Hi, We're a team of three fourth-year undergraduate software engineering students at the University of Waterloo in Canada. In late 2015 we posted on the list [1] to ask for a project to undertake for our program's capstone design project, and Andrew Cooper pointed us in the direction of the live

[Xen-devel] [PATCH RFC 04/20] libxc/xc_sr_save.c: add WRITE_TRIVIAL_RECORD_FN()

2017-03-27 Thread Joshua Otto
Writing the libxc save stream requires writing a few 'trivial' records, consisting only of a header with a particular type. As a readability aid, it's nice to have obviously-named functions that write these sorts of records into the stream - for example, the first such function was write_end_recor

[Xen-devel] [PATCH RFC 03/20] libxc/xc_sr_restore.c: use write_record() in send_checkpoint_dirty_pfn_list()

2017-03-27 Thread Joshua Otto
Teach send_checkpoint_dirty_pfn_list() to use write_record()'s new fd parameter, avoiding the need for a manual writev(). No functional change. Signed-off-by: Joshua Otto --- tools/libxc/xc_sr_restore.c | 27 --- 1 file changed, 4 insertions(+), 23 deletions(-) diff --g

[Xen-devel] [PATCH RFC 02/20] libxc/xc_sr: parameterise write_record() on fd

2017-03-27 Thread Joshua Otto
Right now, write_split_record() - which is delegated to by write_record() - implicitly writes to ctx->fd. This means it can't be used with the restore context's send_back_fd, which is unhandy. Add an 'fd' parameter to both write_record() and write_split_record(), and mechanically update all exist

[Xen-devel] [PATCH RFC 07/20] migration: defer precopy policy to libxl

2017-03-27 Thread Joshua Otto
The precopy phase of the xc_domain_save() live migration algorithm has historically been implemented to run until either a) (almost) no pages are dirty or b) some fixed, hard-coded maximum number of precopy iterations has been exceeded. This policy and its implementation are less than ideal for a

[Xen-devel] [PATCH RFC 08/20] libxl/migration: add precopy tuning parameters

2017-03-27 Thread Joshua Otto
In the context of the live migration algorithm, the precopy iteration count refers to the number of page-copying iterations performed prior to the suspension of the guest and transmission of the final set of dirty pages. Similarly, the precopy dirty threshold refers to the dirty page count below w

[Xen-devel] [PATCH RFC 06/20] libxc/xc_sr: factor helpers out of handle_page_data()

2017-03-27 Thread Joshua Otto
When processing a PAGE_DATA record, the restore code: 1) applies a number of sanity checks on the record's headers and size 2) decodes the list of packed page info into pfns and their types 3) using the pfn and type info, populates and fills the pages into the guest using process_page_data() St

Re: [Xen-devel] [PATCH 0/6] xen: sched: improve scalability of Credit1, and optimize a bit both Credit1 and Credit2

2017-03-27 Thread Dario Faggioli
On Thu, 2017-03-02 at 11:37 +0100, Dario Faggioli wrote: > Hello, > Hey, George, About this series. I was re-looking at it, and I figured out that: > Dario Faggioli (6): >   xen: credit1: simplify csched_runq_steal() a little bit. >   xen: credit: (micro) optimize csched_runq_steal(). >

[Xen-devel] [PATCH RFC 09/20] libxc/xc_sr_save: introduce save batch types

2017-03-27 Thread Joshua Otto
To write guest pages into the stream, the save logic builds up batches of pfns to be written and performs all of the work necessary to write them whenever a full batch has been accumulated. Writing a PAGE_DATA batch entails determining the types of all pfns in the batch, mapping the subset of pfns

[Xen-devel] [PATCH RFC 10/20] libxc/xc_sr_save.c: initialise rec.data before free()

2017-03-27 Thread Joshua Otto
colo_merge_secondary_dirty_bitmap() unconditionally free()s the .data member of its local xc_sr_record structure rec on its exit path. However, if the initial call to read_record() fails then this member is uninitialised. Initialise it. Signed-off-by: Joshua Otto --- tools/libxc/xc_sr_save.c |

[Xen-devel] [PATCH RFC 11/20] libxc/migration: correct hvm record ordering specification

2017-03-27 Thread Joshua Otto
The libxc migration stream specification document asserts that, within an hvm migration stream, "HVM_PARAMS must precede HVM_CONTEXT, as certain parameters can affect the validity of architectural state in the context." This sounds reasonable, but the in-tree implementation of hvm domain save actu

[Xen-devel] [PATCH RFC 01/13] x86/mm: export {get,put}_pg_owner

2017-03-27 Thread Wei Liu
Prefix them with "mm_" and add declarations to asm-x86/mm.h. They will be needed when we split PV specific code out of x86/mm.c. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 20 ++-- xen/include/asm-x86/mm.h | 4 2 files changed, 14 insertio

[Xen-devel] [PATCH RFC 04/13] x86/mm: carve out create_grant_pv_mapping

2017-03-27 Thread Wei Liu
We will later split out PV specific code to pv/mm.c. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 4bf94227cc..b44d44c782 100644 --- a/xen/arch/

[Xen-devel] [PATCH RFC 06/13] x86/mm: extract page table masks to mm.h

2017-03-27 Thread Wei Liu
The masks are going to be needed by common page table management code and PV page table management code. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 21 + xen/include/asm-x86/mm.h | 21 + 2 files changed, 22 insertions(+),

[Xen-devel] [PATCH RFC 05/13] x86/mm: carve out replace_grant_pv_mapping

2017-03-27 Thread Wei Liu
We will later split out PV specific code to pv/mm.c. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c | 18 -- 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index b44d44c782..c4924521b0 100644 --- a/xen/arc

[Xen-devel] [PATCH RFC 07/13] x86/mm: extract PAGE_CACHE_ATTRS to mm.h

2017-03-27 Thread Wei Liu
No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 2 -- xen/include/asm-x86/mm.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 93eb848e72..888b4532f4 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/m

[Xen-devel] [PATCH RFC 03/13] x86/mm: export vcpumask_to_pcpumask

2017-03-27 Thread Wei Liu
Prefix it with "mm_". No functional change. Signed-off-by: Wei Liu --- It used to be a inline function, but I don't think there is no point in making it inline because PV mmu operations are already expensive. Having a callq to another function won't make noticeable difference. It is not annotate

[Xen-devel] [PATCH RFC 08/13] x86/mm: extract adjust_guest_l*e macros to mm.h

2017-03-27 Thread Wei Liu
No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 46 -- xen/include/asm-x86/mm.h | 47 +++ 2 files changed, 47 insertions(+), 46 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/a

[Xen-devel] [PATCH RFC 02/13] x86/mm: move MEM_LOG to asm-x86/mm.h

2017-03-27 Thread Wei Liu
It will be needed later when we split mm.c. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 2 -- xen/include/asm-x86/mm.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index c0bdc667bf..a1d867bd94 100644

[Xen-devel] [PATCH RFC 12/20] libxc/migration: specify postcopy live migration

2017-03-27 Thread Joshua Otto
- allocate the new postcopy record type numbers - augment the stream format specification to include these new types and their role in the protocol Signed-off-by: Joshua Otto --- docs/specs/libxc-migration-stream.pandoc | 177 ++- tools/libxc/xc_sr_common.c

[Xen-devel] [PATCH RFC 09/13] x86/mm: export a bunch of {get, put}_page functions

2017-03-27 Thread Wei Liu
They will be needed by common code and PV specific code later. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 41 ++--- xen/include/asm-x86/mm.h | 16 2 files changed, 34 insertions(+), 23 deletions(-) diff --git

[Xen-devel] [PATCH RFC 00/13] Refactor x86/mm.c

2017-03-27 Thread Wei Liu
This series splits x86/mm.c into PV and HVM specific files. The long term goal is to have clear separation of guest supporting code so that we can disable modes as we see fit. This would also help a later project to move PV interface into a PVH container. I think if I try harder some of the page

[Xen-devel] [PATCH RFC 13/20] libxc/migration: add try_read_record()

2017-03-27 Thread Joshua Otto
Enable non-blocking migration record reads by adding a helper routine that manages the context of a record read across multiple invocations as the record's data becomes available over time. Signed-off-by: Joshua Otto --- tools/libxc/xc_private.c | 21 +++ tools/libxc/xc_private.h

[Xen-devel] [PATCH RFC 14/20] libxc/migration: implement the sender side of postcopy live migration

2017-03-27 Thread Joshua Otto
Add a new 'postcopy' phase to the live migration algorithm, during which unmigrated domain memory is paged over the network on-demand _after_ the guest has been resumed at the destination. To do so: - Add a new precopy policy option, XGS_POLICY_POSTCOPY, that policies can use to request a transi

Re: [Xen-devel] [PATCH v2] configure: use pkg-config for obtaining xen version

2017-03-27 Thread Juergen Gross
On 27/03/17 11:07, Paul Durrant wrote: >> -Original Message- >> From: Juergen Gross [mailto:jgr...@suse.com] >> Sent: 27 March 2017 08:43 >> To: qemu-de...@nongnu.org; xen-de...@lists.xenproject.org >> Cc: Anthony Perard ; kra...@redhat.com; >> sstabell...@kernel.org; Paul Durrant ; Juergen

[Xen-devel] [PATCH RFC 15/20] libxc/migration: implement the receiver side of postcopy live migration

2017-03-27 Thread Joshua Otto
Add the receive-side logic for a new 'postcopy' phase in the live migration algorithm. To support this migration phase: - Augment the main restore record-processing logic to recognize and handle the postcopy-initiation records. - Add the core logic for the phase, postcopy_restore(), which marks

[Xen-devel] [PATCH RFC 11/13] x86/mm: export create_pae_xen_mappings

2017-03-27 Thread Wei Liu
No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 2 +- xen/include/asm-x86/mm.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 0f49671191..92e79d7fb6 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.

[Xen-devel] [PATCH RFC 10/13] x86/mm: export invalidate_shadow_ldt

2017-03-27 Thread Wei Liu
No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/mm.c| 2 +- xen/include/asm-x86/mm.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index 13c8dd8ac0..0f49671191 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.

[Xen-devel] [PATCH RFC 13/13] x86/mm: split HVM grant table code to hvm/mm.c

2017-03-27 Thread Wei Liu
PG_external requires hardware support so the code guarded by that is HVM only. No functional change. Signed-off-by: Wei Liu --- xen/arch/x86/hvm/Makefile | 1 + xen/arch/x86/hvm/mm.c | 84 +++ xen/arch/x86/mm.c | 48 --

[Xen-devel] [PATCH RFC 16/20] libxl/libxl_stream_write.c: track callback chains with an explicit phase

2017-03-27 Thread Joshua Otto
There are three callback chains through libxl_stream_write: the 'normal' straight-through save path initiated by libxl__stream_write_start(), the iterated checkpoint path initiated each time by libxl__stream_write_start_checkpoint(), and the (short) back-channel checkpoint path initiated by libxl__

[Xen-devel] [PATCH RFC 17/20] libxl/libxl_stream_read.c: track callback chains with an explicit phase

2017-03-27 Thread Joshua Otto
As the previous patch did for libxl_stream_write, do for libxl_stream_read. libxl_stream_read already has a notion of phase for its record-buffering behaviour - this is combined with the callback chain phase. Again, this is done to support the addition of a new callback chain for postcopy live mi

[Xen-devel] [PATCH RFC 18/20] libxl/migration: implement the sender side of postcopy live migration

2017-03-27 Thread Joshua Otto
To make the libxl sender capable of supporting postcopy live migration: - Add a postcopy transition callback chain through the stream writer (this callback chain is nearly identical to the checkpoint callback chain, and differs meaningfully only in its failure/completion behaviour) - Wire this

[Xen-devel] [ovmf test] 106932: all pass - PUSHED

2017-03-27 Thread osstest service owner
flight 106932 ovmf real [real] http://logs.test-lab.xenproject.org/osstest/logs/106932/ Perfect :-) All tests in this flight passed as required version targeted for testing: ovmf 0027921b1be4b41a766c982615b4ed5a4868d318 baseline version: ovmf d590cce5cd9b9d31848ed

Re: [Xen-devel] [PATCH 1/2] xen/arm32: Introduce alternative runtime patching

2017-03-27 Thread Wei Chen
Hi Julien, On 2017/3/24 18:48, Julien Grall wrote: > On 03/17/2017 06:35 AM, Wei Chen wrote: >> Hi Julien, > > Hi Wei, > > Sorry for the late answer, I missed that e-mail. > >> On 2017/3/17 6:24, Julien Grall wrote: >>> On 03/16/2017 09:53 AM, Wei Chen wrote: > > [...] > +/* + * Decode t

[Xen-devel] [PATCH RFC 19/20] libxl/migration: implement the receiver side of postcopy live migration

2017-03-27 Thread Joshua Otto
To make the libxl receiver capable of supporting postcopy live migration: - As was done for the libxl stream writer, add a symmetric callback chain through the stream reader that reads the sequence of xl records necessary to resume the guest and enter the postcopy phase. This chain is very s

Re: [Xen-devel] [PATCH v9 08/25] x86: refactor psr: L3 CAT: implement get value flow.

2017-03-27 Thread Jan Beulich
>>> On 16.03.17 at 12:07, wrote: > --- a/xen/arch/x86/domctl.c > +++ b/xen/arch/x86/domctl.c > @@ -1455,23 +1455,26 @@ long arch_do_domctl( > break; > > case XEN_DOMCTL_PSR_CAT_OP_GET_L3_CBM: > -ret = psr_get_l3_cbm(d, domctl->u.psr_cat_op.target, > -

[Xen-devel] [PATCH RFC 20/20] tools: expose postcopy live migration support in libxl and xl

2017-03-27 Thread Joshua Otto
- Add a 'memory_strategy' parameter to libxl_domain_live_migrate(), which specifies how the remainder of the memory migration should be approached after the iterative precopy phase is completed. - Plug this parameter into the libxl migration precopy policy implementation. - Add --postcopy to

Re: [Xen-devel] [PATCH v2] configure: use pkg-config for obtaining xen version

2017-03-27 Thread Paul Durrant
> -Original Message- > From: Juergen Gross [mailto:jgr...@suse.com] > Sent: 27 March 2017 10:15 > To: Paul Durrant ; qemu-de...@nongnu.org; xen- > de...@lists.xenproject.org > Cc: Anthony Perard ; kra...@redhat.com; > sstabell...@kernel.org > Subject: Re: [PATCH v2] configure: use pkg-confi

Re: [Xen-devel] [PATCH] xen: additionally restrict xenforeignmemory operations

2017-03-27 Thread Paul Durrant
> -Original Message- [snip] > > This is OK but the file is growing too entangled. What do you think of > the following, which moves the if CONFIG_XEN_CTRL_INTERFACE_VERSION > < > 40701 at the top? This way we don't have to add yet another ifdef. > Yes, this looks better and appears to DT

[Xen-devel] [PATCH 01/10] x86/emul: Correct the decoding of vlddqu

2017-03-27 Thread Andrew Cooper
vlddqu is encoded with 0xf2 which causes it to fall into the Scalar general case in x86_decode_twobyte(). However, it really does have just two operands, so must remain TwoOp AFL discovered that the instruction c5 5b f0 3c e5 95 0a cd 63 was considered valid despite it being a two operand instruc

[Xen-devel] [PATCH 03/10] tools/insn-fuzz: Don't use memcpy() for zero-length reads

2017-03-27 Thread Andrew Cooper
For control-flow changes, the emulator needs to perform a zero-length instruction fetch at the target offset. It also passes NULL for the destination buffer, as there is no instruction stream to collect. This trips up UBSAN, even with a size of 0. Exclude zero-length reads from using memcpy(), r

[Xen-devel] [PATCH 06/10] tools/insn-fuzz: Correct hook prototypes, and assert() appropriate segments

2017-03-27 Thread Andrew Cooper
The correct prototypes for the hooks are to use enum x86_segment rather than unsigned int. It is implementation specific as to whether this compiles. assert() that the emulator never passes an inappropriate segment. The only hook which may legitimately be passed x86_seg_none is invlpg(). Signed

[Xen-devel] [PATCH 05/10] tools/insn-fuzz: Fix a stability bug in afl-clang-fast mode

2017-03-27 Thread Andrew Cooper
The fuzzing harness conditionally disables hooks to test error paths in the emulator. However, fuzz_emulops is a static structure. c/s 69f4633 "tools/insn-fuzz: Support AFL's afl-clang-fast mode" introduced persistent mode, but because fuzz_emulops is static, the clobbering of hooks accumulates o

[Xen-devel] [PATCH 00/10] x86 emulation bugfixes and fuzzer improvements

2017-03-27 Thread Andrew Cooper
Andrew Cooper (10): x86/emul: Correct the decoding of vlddqu x86/emul: Add feature check for clzero tools/insn-fuzz: Don't use memcpy() for zero-length reads tools/insn-fuzz: Avoid making use of static data tools/insn-fuzz: Fix a stability bug in afl-clang-fast mode tools/insn-fuzz: Cor

[Xen-devel] [PATCH 07/10] tools/insn-fuzz: Provide IA32_DEBUGCTL consistently to the emulator

2017-03-27 Thread Andrew Cooper
x86_emulates()'s is_branch_step() performs a speculative read of IA32_DEBUGCTL, but doesn't squash exceptions should they arise. In reality, this MSR is always available. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: George Dunlap CC: Ian Jackson CC: Wei Liu RFC: I'm also wondering w

[Xen-devel] [PATCH 04/10] tools/insn-fuzz: Avoid making use of static data

2017-03-27 Thread Andrew Cooper
AFL has a measure of stability, where it passes the same corpus into the fuzzing harness and observes whether the execution path changes from before. Any instability in the fuzzing harness reduces its effectiveness, as an observed crash may not reliably be caused by the original corpus. In prepara

[Xen-devel] [PATCH 09/10] tools/x86emul: Advertise more CPUID features for testing purposes

2017-03-27 Thread Andrew Cooper
Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: George Dunlap CC: Ian Jackson CC: Wei Liu --- tools/tests/x86_emulator/x86_emulate.c | 41 -- 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/tools/tests/x86_emulator/x86_emulate.c b/tools/te

[Xen-devel] [PATCH 02/10] x86/emul: Add feature check for clzero

2017-03-27 Thread Andrew Cooper
Signed-off-by: Andrew Cooper --- CC: Jan Beulich --- xen/arch/x86/x86_emulate/x86_emulate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 497cc77..7af8a42 100644 --- a/xen/arch/x86/x86_emulate/x86_emu

[Xen-devel] [PATCH 08/10] tools/insn-fuzz: Fix assertion failures in x86_emulate_wrapper()

2017-03-27 Thread Andrew Cooper
c/s 92cf67888 "x86/emul: Hold x86_emulate() to strict X86EMUL_EXCEPTION requirements" was appropriate for the hypervisor, but the fuzzer stubs didn't conform to the stricter requirements. AFL is very quick to discover this. Extend the fuzzing harness exception logic to raise exceptions appropriat

Re: [Xen-devel] [PATCH v9 09/25] x86: refactor psr: L3 CAT: set value: implement framework.

2017-03-27 Thread Jan Beulich
>>> On 16.03.17 at 12:07, wrote: > --- a/xen/arch/x86/domctl.c > +++ b/xen/arch/x86/domctl.c > @@ -1437,21 +1437,21 @@ long arch_do_domctl( > switch ( domctl->u.psr_cat_op.cmd ) > { > case XEN_DOMCTL_PSR_CAT_OP_SET_L3_CBM: > -ret = psr_set_l3_cbm(d, domctl->u

[Xen-devel] [PATCH v3 2/6] x86/pagewalk: Helpers for reserved bit handling

2017-03-27 Thread Andrew Cooper
Some bits are unconditionally reserved in pagetable entries, or reserved because of alignment restrictions. Other bits are reserved because of control register configuration. Introduce helpers which take an individual vcpu and guest pagetable entry, and calculates whether any reserved bits are se

[Xen-devel] [PATCH v3 0/6] Fixes to pagetable handling

2017-03-27 Thread Andrew Cooper
This series has been a long time in preparation (i.e. most of the 4.8 and 4.9 dev cycles). It started when I tried to make an XTF PoC for XSA-176, and stumbled upon the the _PAGE_PAGED aliasing issue (see patch 7) which caused by PoC to be descheduled waiting for (a non-existent) paging agent to r

[Xen-devel] [PATCH v3 6/6] x86/pagewalk: non-functional cleanup

2017-03-27 Thread Andrew Cooper
* Drop trailing whitespace * Consistently apply Xen style * Introduce a local variable block Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich Acked-by: Tim Deegan --- CC: Tim Deegan CC: George Dunlap v2: * New --- xen/arch/x86/mm/guest_walk.c | 82 --

[Xen-devel] [PATCH v3 3/6] x86/pagewalk: Re-implement the pagetable walker

2017-03-27 Thread Andrew Cooper
The existing pagetable walker has complicated return semantics, which squeeze multiple pieces of information into single integer. This would be fine if the information didn't overlap, but it does. Specifically, _PAGE_INVALID_BITS for 3-level guests alias _PAGE_PAGED and _PAGE_SHARED. A guest whi

[Xen-devel] [PATCH v3 5/6] x86/pagewalk: Improve the logic behind setting access and dirty bits

2017-03-27 Thread Andrew Cooper
The boolean pse2M is misnamed, because it might refer to a 4M superpage. Switch the logic to be in terms of the level of the leaf entry, and rearrange the calls to set_ad_bits() to be a fallthrough switch statement, to make it easier to follow. Alter set_ad_bits() to take properly typed pointers

[Xen-devel] [PATCH v3 4/6] x86/shadow: Use the pagewalk reserved bits helpers

2017-03-27 Thread Andrew Cooper
The shadow logic should not create a valid/present shadow of a guest PTE which contains reserved bits from the guests point of view. It is not guaranteed that the hardware pagewalk will come to the same conclusion, and raise a pagefault. Shadows created on demand from the pagefault handler are fi

[Xen-devel] [PATCH v3 1/6] x86/pagewalk: Clean up guest_supports_* predicates

2017-03-27 Thread Andrew Cooper
Switch them to returning bool, and taking const parameters. Rename guest_supports_superpages() to guest_can_use_l2_superpages() to indicate which level of pagetables it is actually referring to as well as indicating that it is more complicated than just control register settings, and rename guest_

[Xen-devel] [PATCH 10/10] tools/insn-fuzz: Always use x86_swint_emulate_all

2017-03-27 Thread Andrew Cooper
The swint_emulate parameter indicates how much extra work the emulator needs to do to cover issues with certain hardware injection methods. Using x86_swint_emulate_all opens up maximum coverage in the emulator. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: George Dunlap CC: Ian Jackson

[Xen-devel] arm64: dma_to_phys/phys_to_dma need to be properly implemented

2017-03-27 Thread Oleksandr Andrushchenko
Hi, all! First of all this could be a generic ARM64 question, but only(?) Xen users will suffer. At the moment for ARM64 dma_to_phys/phys_to_dma both assume that MFN == PFN and though those do not do MFN <-> PFN conversion. In case if MFN is mapped from other domain, then MFN != PFN and the abov

Re: [Xen-devel] [PATCH v3 5/6] x86/pagewalk: Improve the logic behind setting access and dirty bits

2017-03-27 Thread Tim Deegan
At 11:03 +0100 on 27 Mar (1490612603), Andrew Cooper wrote: > The boolean pse2M is misnamed, because it might refer to a 4M superpage. > > Switch the logic to be in terms of the level of the leaf entry, and rearrange > the calls to set_ad_bits() to be a fallthrough switch statement, to make it > e

Re: [Xen-devel] [PATCH v9 10/25] x86: refactor psr: L3 CAT: set value: assemble features value array.

2017-03-27 Thread Jan Beulich
>>> On 16.03.17 at 12:08, wrote: > --- a/xen/arch/x86/psr.c > +++ b/xen/arch/x86/psr.c > @@ -101,6 +101,28 @@ struct feat_node { > /* get_val is used to get feature COS register value. */ > void (*get_val)(const struct feat_node *feat, unsigned int cos, >

[Xen-devel] [PATCH v2 3/7] x86/hvm: convert gsi_assert_count into a variable size array

2017-03-27 Thread Roger Pau Monne
Rearrange the fields of hvm_irq so that gsi_assert_count can be converted into a variable size array and add a new field to account the number of GSIs. Due to this changes the irq member in the hvm_domain struct also needs to become a pointer set at runtime. Signed-off-by: Roger Pau Monné --- Cc

[Xen-devel] [PATCH v2 4/7] x86/vioapic: allow the vIO APIC to have a variable number of pins

2017-03-27 Thread Roger Pau Monne
Although it's still always set to VIOAPIC_NUM_PINS (48). Add a new field to the hvm_ioapic struct to contain the number of pins (number of IO redirection table entries) and turn the redirection table into a variable sized array. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Coop

[Xen-devel] [PATCH v2 0/7] x86/vioapic: introduce support for multiple vIO APICs

2017-03-27 Thread Roger Pau Monne
Hello, This patch series introduce support for having a variable number of entries in vIO APICs, and also having a variable number of vIO APICs per domain. This functionality is not used by unprivileged guests, that are still limited to a single IO APIC with 48 entries. The functionality introduc

[Xen-devel] [PATCH v2 6/7] x86/ioapic: add prototype for apic_gsi_base to io_apic.h

2017-03-27 Thread Roger Pau Monne
So that the function can be called from other files without adding prototypes to each of them. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper --- Changes since v1: - Add io_ prefix to avoid confusion. - Make the parameter unsigned. --- xen/arch/x86/io_apic.c| 4

[Xen-devel] [PATCH v2 5/7] x86/vioapic: introduce support for multiple vIO APICS

2017-03-27 Thread Roger Pau Monne
Add support for multiple vIO APICs on the same domain, thus turning d->arch.hvm_domain.vioapic into an array of vIO APIC control structures. Note that this functionality is not exposed to unprivileged guests, and will only be used by PVHv2 Dom0. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich

[Xen-devel] [PATCH v2 2/7] x86/hvm: introduce hvm_domain_irq macro

2017-03-27 Thread Roger Pau Monne
Introduce a macro to get a pointer to the hvm_irq for a HVM domain. No functional change. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper Cc: Kevin Tian --- xen/arch/x86/hvm/irq.c| 30 +++--- xen/arch/x86/hvm/vioapic.c|

[Xen-devel] [PATCH v2 1/7] x86/vioapic: introduce a internal vIO APIC structure

2017-03-27 Thread Roger Pau Monne
This is required in order to have a variable number of vIO APIC pins, instead of the current fixed value (48). Note that this patch only expands the fields of the hvm_vioapic struct, without actually introducing any new fields or functionality. The reason to expand the hvm_vioapic structure instea

[Xen-devel] [PATCH v2 7/7] x86/vioapic: allow PVHv2 Dom0 to have more than one IO APIC

2017-03-27 Thread Roger Pau Monne
The base address, id and number of pins of the vIO APICs exposed to PVHv2 Dom0 is the same as the values found on bare metal. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper --- xen/arch/x86/hvm/dom0_build.c | 33 - xen/arch/x86/hvm/hvm.c

Re: [Xen-devel] [PATCH v9 11/25] x86: refactor psr: L3 CAT: set value: implement cos finding flow.

2017-03-27 Thread Jan Beulich
>>> On 16.03.17 at 12:08, wrote: > --- a/xen/arch/x86/psr.c > +++ b/xen/arch/x86/psr.c > @@ -123,6 +123,19 @@ struct feat_node { > const struct feat_node *feat, > enum cbm_type type, > uint32_t new_val); > + > +

Re: [Xen-devel] [PATCH 1/3] xen: sched: introduce the 'null' semi-static scheduler

2017-03-27 Thread George Dunlap
On 17/03/17 18:42, Dario Faggioli wrote: > In cases where one is absolutely sure that there will be > less vCPUs than pCPUs, having to pay the cose, mostly in > terms of overhead, of an advanced scheduler may be not > desirable. > > The simple scheduler implemented here could be a solution. > Here

Re: [Xen-devel] [PATCH v9 12/25] x86: refactor psr: L3 CAT: set value: implement cos id picking flow.

2017-03-27 Thread Jan Beulich
>>> On 16.03.17 at 12:08, wrote: > +static bool cat_fits_cos_max(const uint32_t val[], > + const struct feat_node *feat, > + unsigned int cos) > +{ > +if ( cos > feat->info.cat_info.cos_max && > + val[0] != feat->cos_reg_val[0] )

[Xen-devel] [PATCH 2/5] x86/ioapic: introduce helper to fetch triggering mode of GSI

2017-03-27 Thread Roger Pau Monne
This helper is used in order to fetch the triggering mode of a GSI. This is needed in order to figure out if a GSI can be bound with the shared attribute or not (only level triggered interrupts should be shared). Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper --- xen/arch

[Xen-devel] [PATCH 0/5] x86/dpci: bind legacy PCI interrupts to PVHv2 Dom0

2017-03-27 Thread Roger Pau Monne
Hello, The following patches allow binding bare-metal GSIs into a PVHv2 Dom0, by snooping on the vIO APICs writes made by Dom0. In order to implement this a new PT_IRQ_TYPE_GSI bind type has to be introduced, since PT_IRQ_TYPE_PCI is not suitable because Xen doesn't know the PCI device(s) behind

[Xen-devel] [PATCH 5/5] x86/vioapic: bind interrupts to PVH Dom0

2017-03-27 Thread Roger Pau Monne
Add the glue in order to bind the PVH Dom0 GSI from bare metal. This is done when Dom0 unmasks the vIO APIC pins, by fetching the current pin settings and setting up the PIRQ, which will then be bound to Dom0 using the newly introduced PT_IRQ_TYPE_GSI bind type. Signed-off-by: Roger Pau Monné ---

[Xen-devel] [PATCH 4/5] x86/physdev: move prototypes of physdev_{map/unmap}_pirq to headers

2017-03-27 Thread Roger Pau Monne
So they can be called outside of the physdev.c file. Signed-off-by: Roger Pau Monné --- Cc: Jan Beulich Cc: Andrew Cooper --- xen/arch/x86/physdev.c| 4 xen/include/asm-x86/irq.h | 5 + 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/physdev.c b/xen/arc

[Xen-devel] [PATCH 3/5] x86/pt: introduce PT_IRQ_TYPE_GSI to bind GSIs to a PVH Dom0

2017-03-27 Thread Roger Pau Monne
The current type used to bind a legacy IRQ into a HVM guest is not suitable for PVH Dom0 because the PCI device that's originating the interrupt is not know to Xen. To solve that a new bind type is introduced (PT_IRQ_TYPE_GSI), that takes a gsi as a guest destination parameter (instead of a PCI de

  1   2   3   >