Hi Guys,
Xen currently doesn't map ECAM space specified in static ACPI table. Seeking
opinion on how this should be handled properly. Each root complex ECAM region
takes up 64K 4K pages (256MB). For some platforms there might be multiple root
complexes. Is the plan to map all at once? Juli
>>> On 14.12.16 at 08:29, wrote:
>> From: Andrew Cooper [mailto:andrew.coop...@citrix.com]
>> Sent: Wednesday, December 14, 2016 3:25 AM
>> Executing a sti while singlestepping is active currently causes a
>> VMEntry failure, because the #DB is still intercepted, but on re-entry,
>> the sti inter
>>> On 13.12.16 at 20:24, wrote:
> Experimentally, on both Intel and AMD hardware, the mov_ss shadow
> inhibits #DB and the VMexit caused by its interception, whereas the sti
> shadow doesn't inhibit #DB. Therefore, my planned fix for VT-x is to
> unconditionally clobber the sti shadow if we inte
Hi Guys,
Xen currently does not handle mapping mmio regions specified in standard static
ACPI tables such as BERT, TPM2, GT block, IORT, HEST, etc. There has been some
initial discussions on using whitelist and leave it up to the individual
drivers in dom0 who need the particular region in par
flight 103209 xen-4.6-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/103209/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
test-amd64-i386-libvirt-qemuu-debianhvm-amd64-xsm 9 debian-hvm-install fail in
103159 pass in 103209
test-a
Hello Wei,
On Wed, 2016-12-14 at 07:52 +, Wei Liu wrote:
> On Wed, Dec 14, 2016 at 06:24:15AM +, osstest service owner wrote:
> > flight 103306 xen-unstable-smoke real [real]
> > http://logs.test-lab.xenproject.org/osstest/logs/103306/
> >
> > Regressions :-(
> >
> > Tests which did not
branch xen-unstable
xenbranch xen-unstable
job test-amd64-amd64-xl-qemut-win7-amd64
testid xen-boot
Tree: linux
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
Tree: linuxfirmware git://xenbits.xen.org/osstest/linux-firmware.git
Tree: qemu git://xenbits.xen.org/qemu-xen-trad
Qdisk supports qcow and qcow2, extend it to also support qed disk
format.
Signed-off-by: Cédric Bosdonnat
Acked-by: Ian Jackson
Acked-by: Wei Liu
---
v2:
* Add qed to the list for possible format values in xl-disk-configuration.txt
* Add LIBXL_HAVE_QED
v3:
* Remove the qed: obsolete
On 12/13/2016 07:10 PM, Andrew Cooper wrote:
> On 13/12/16 15:58, Razvan Cojocaru wrote:
>> Hello, and first of all thanks for the discussion!
>>
>>> Think of it a bit more like introducing a new action emulator (name
>>> definitely subject to improvement), which implements things such as
>>> wrmsr
flight 103317 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/103317/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-amd64-libvirt 5 libvirt-buildfail REGR. vs. 103284
Tests which
This run is configured for baseline tests only.
flight 68217 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68217/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf 94a1bc1212edf521b7c96bfb9dc653818c95bec7
baseline v
>>> On 13.12.16 at 15:50, wrote:
> Added support for a new event type, VM_EVENT_REASON_INTERRUPT,
> which is now fired in a one-shot manner when enabled via the new
> VM_EVENT_FLAG_GET_NEXT_INTERRUPT vm_event response flag.
> The patch also fixes the behaviour of the xc_hvm_inject_trap()
> hyperca
On 12/14/2016 11:04 AM, Jan Beulich wrote:
On 13.12.16 at 15:50, wrote:
>> Added support for a new event type, VM_EVENT_REASON_INTERRUPT,
>> which is now fired in a one-shot manner when enabled via the new
>> VM_EVENT_FLAG_GET_NEXT_INTERRUPT vm_event response flag.
>> The patch also fixes the
>>> On 14.12.16 at 09:53, wrote:
> On 12/13/2016 07:10 PM, Andrew Cooper wrote:
>> Do you have stats on which instructions you most frequently have to
>> singlestep because of lack of emulator support, or is the spread
>> essentially random?
>
> Here's what I've gathered just now with nothing mor
On 14/12/2016 07:35, Jan Beulich wrote:
On 13.12.16 at 17:53, wrote:
>> On 13/12/16 11:28, Jan Beulich wrote:
>>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>>> @@ -1185,7 +1185,7 @@ static int ioport_access_check(
>>>
>>> fail_if(ops-
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -5190,8 +5190,26 @@ x86_emulate(
case X86EMUL_OPC(0x0f, 0xae): case X86EMUL_OPC_66(0x0f, 0xae): /* Grp15 */
switch ( modrm_reg & 7 )
{
-case 7: /*
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -432,6 +432,7 @@ typedef union {
#define CR4_OSFXSR (1<<9)
#define CR4_OSXMMEXCPT (1<<10)
#define CR4_UMIP (1<<11)
+#define CR4_FSGSBASE (1<<16)
#define CR4_OSXS
flight 103263 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/103263/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-libvirt-qcow2 6 xen-boot fail REGR. vs. 103065
test-armhf-armhf-libvir
I think this then completes the set of simple move instructions the
emulator supports; the next step would then be to fully support
the SSEn/AVXn instruction sets.
1: support load forms of {,V}MOV{D,Q}
2: support {,V}LDDQU
3: support {,V}MOVNTDQA
Signed-off-by: Jan Beulich
flight 68218 distros-debian-squeeze real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/68218/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-amd64-amd64-amd64-squeeze-netboot-pygrub 9 debian-di-install fail like
68168
test-amd64-
Signed-off-by: Jan Beulich
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -823,6 +823,29 @@ int main(int argc, char **argv)
else
printf("skipped\n");
+printf("%-40s", "Testing movq 32(%ecx),%xmm1...");
+if ( stack_e
Also take the opportunity and adjust the vmovdqu test case the new one
here has been cloned from: To zero a ymm register we don't need to go
through hoops, as 128-bit AVX insns zero the upper portion of the
destination register, and in the disabled AVX2 code there was a wrong
YMM register used.
Si
Signed-off-by: Jan Beulich
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -1608,6 +1608,74 @@ int main(int argc, char **argv)
goto fail;
#if 0 /* Don't use AVX2 instructions for now */
asm ( "vpcmpeqb %%ymm2, %%ymm2,
Added support for a new event type, VM_EVENT_REASON_INTERRUPT,
which is now fired in a one-shot manner when enabled via the new
VM_EVENT_FLAG_GET_NEXT_INTERRUPT vm_event response flag.
The patch also fixes the behaviour of the xc_hvm_inject_trap()
hypercall, which would lead to non-architectural in
nvmx_handle_vmxon() previously checks whether a vcpu is in VMX
operation by comparing its vmxon_region_pa with GPA 0. However, 0 is
also a valid VMXON region address. If L1 hypervisor had set the VMXON
region address to 0, the check in nvmx_handle_vmxon() will be skipped.
Fix this problem by using
... because INVALID_PADDR is a more general one.
Suggested-by: Jan Beulich
Signed-off-by: Haozhong Zhang
---
xen/arch/x86/hvm/nestedhvm.c | 2 +-
xen/arch/x86/hvm/svm/nestedsvm.c | 18 +-
xen/arch/x86/hvm/svm/vmcb.c | 2 +-
xen/arch/x86/hvm/vmx/vvmx.c | 16 ++
According to Intel SDM, section "VMXON - Enter VMX Operation", a
VMfail should be returned to L1 hypervisor if L1 vmxon is executed in
VMX operation, rather than just print a warning message.
Signed-off-by: Haozhong Zhang
Reviewed-by: Andrew Cooper
Acked-by: Kevin Tian
---
xen/arch/x86/hvm/vmx
This patchset fixes bugs and adds missing checks in nvmx_handle_vmxon(),
in order to make it more consistent to Intel SDM (section "VMXON - Enter
VMX Operation" in Vol 3).
Changes in v2:
* Add necessary 'const' in patch 1. (Andrew Cooper)
* Use the existing INVALID_PADDR rather than introducing
Check whether the operand of L1 vmxon is a valid VMXON region address
and whether the VMXON region at that address contains a valid revision
ID.
Signed-off-by: Haozhong Zhang
Reviewed-by: Andrew Cooper
Reviewed-by: Konrad Rzeszutek Wilk
Acked-by: Kevin Tian
---
xen/arch/x86/hvm/vmx/vvmx.c | 1
>>> On 14.12.16 at 11:11, wrote:
> ... because INVALID_PADDR is a more general one.
>
> Suggested-by: Jan Beulich
> Signed-off-by: Haozhong Zhang
Reviewed-by: Jan Beulich
Thanks for doing this!
Jan
___
Xen-devel mailing list
Xen-devel@lists.xen.
On 12/14/16 18:11 +0800, Haozhong Zhang wrote:
... because INVALID_PADDR is a more general one.
Suggested-by: Jan Beulich
Signed-off-by: Haozhong Zhang
---
xen/arch/x86/hvm/nestedhvm.c | 2 +-
xen/arch/x86/hvm/svm/nestedsvm.c | 18 +-
xen/arch/x86/hvm/svm/vmcb.c | 2 +-
On 14/12/16 08:53, Razvan Cojocaru wrote:
> On 12/13/2016 07:10 PM, Andrew Cooper wrote:
>> On 13/12/16 15:58, Razvan Cojocaru wrote:
>>> Hello, and first of all thanks for the discussion!
>>>
Think of it a bit more like introducing a new action emulator (name
definitely subject to improv
On 14/12/16 07:29, Tian, Kevin wrote:
>> From: Andrew Cooper [mailto:andrew.coop...@citrix.com]
>> Sent: Wednesday, December 14, 2016 3:25 AM
>>
>> Hello,
>>
>> All of this came about while reviewing some of Jans improvements to the
>> x86 instruction emulator.
>>
>> It turns out that the XSA-156 /
flight 103327 xen-unstable-coverity real [real]
http://logs.test-lab.xenproject.org/osstest/logs/103327/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
xen fc9229c4bb35c5474fbc67f78e628dcbcc90afc5
baseline version:
xen cb6a
On Wed, Dec 14, 2016 at 09:48:57AM +0100, Cédric Bosdonnat wrote:
> Qdisk supports qcow and qcow2, extend it to also support qed disk
> format.
>
> Signed-off-by: Cédric Bosdonnat
> Acked-by: Ian Jackson
> Acked-by: Wei Liu
This patch was pushed yesterday to staging branch.
To check whether a
The masking of src.val is common to both paths. Move it later and simplify
the entry condition for adjusting the memory operand.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
---
xen/arch/x86/x86_emulate/x86_emulate.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff -
This patch implements the CPU init and free flow including L3 CAT
initialization and feature list free.
Per this patch, you can see how callback functions work and how the
feature list is handled.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 179 +++
The current cache allocation codes in psr.c do not consider
future features addition and are not friendly to extend.
To make psr.c be more flexible to add new features and fulfill
the program principle, open for extension but closed for
modification, we have to refactor the psr.c:
1. Analyze cache
This patch implements the Domain init/free and schedule flows.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 60 +-
1 file changed, 59 insertions(+), 1 deletion(-)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index fa9bc32..746c90e 10
To construct an extendible framework, we need analyze PSR features
and abstract the common things and feature specific things. Then,
encapsulate them into different data structures.
By analyzing PSR features, we can get below map.
+--+--+--+
->| Dom0 | Dom
This patch implements get HW info flow including L3 CAT callback
function.
It also changes sysctl interface to make it more general.
With this patch, 'psr-hwinfo' can work for L3 CAT.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c| 48 ---
xen/
Hi all,
We plan to bring a new PSR (Platform Shared Resource) feature called
Intel L2 Cache Allocation Technology (L2 CAT) to Xen.
Besides the L2 CAT implementaion, we refactor the psr.c to make it more
flexible to add new features and fulfill the principle, open for extension
but closed for modi
This patch creates L2 CAT feature document in doc/features/.
It describes details of L2 CAT.
Signed-off-by: Yi Sun
---
docs/features/intel_psr_l2_cat.pandoc | 347 ++
1 file changed, 347 insertions(+)
create mode 100644 docs/features/intel_psr_l2_cat.pandoc
diff
Continue with previous patches, if fail to find a COS ID, we need allocate
a new COS ID for domain. Only COS ID that ref[COS_ID] is 1 or 0 can be
allocated to input a new set feature values.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 105 -
This patch implements get value flow including L3 CAT callback
function.
It also changes domctl interface to make it more general.
With this patch, 'psr-cat-show' can work for L3 CAT.
Signed-off-by: Yi Sun
---
xen/arch/x86/domctl.c | 18 +-
xen/arch/x86/psr.c| 39 ++
As set value flow is the most complicated one in psr, it will be
divided to some patches to make things clearer. This patch
implements the set value framework to show a whole picture firstly.
It also changes domctl interface to make it more general.
To make the set value flow be general and can s
Continue with previous patches, we have got all features values and
COS ID to set. Then, we write MSRs of all features except the setting
value is same as original value.
Till now, set value process is completed.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 78
Only can one COS ID be used by one domain at one time. That means all enabled
features' COS registers at this COS ID are valid for this domain at that time.
When user updates a feature's value, we need make sure all other features'
values are not affected. So, we firstly need assemble an array whi
Continue with previous patch, we can try to find if there is a
COS ID on which all features' COS registers values are same as
the array assembled before.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 111 -
1 file changed, 110 insertions(+), 1
This patch implements the CPU init and free flow for CDP including L3 CDP
initialization callback function.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 101 +++--
1 file changed, 98 insertions(+), 3 deletions(-)
diff --git a/xen/arch/x86/psr.c
This patch implements L2 CAT set value related callback functions
and domctl interface.
Signed-off-by: Yi Sun
---
xen/arch/x86/domctl.c | 6 ++
xen/arch/x86/psr.c | 132 +++-
xen/include/asm-x86/msr-index.h | 1 +
xen/include/public/
This patch implements the CPU init and free flow for L2 CAT including
L2 CAT initialization callback function.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c| 76 +++
xen/include/asm-x86/psr.h | 1 +
2 files changed, 77 insertions(+)
diff --git
This patch implements changes in xl/xc changes to support
showing CBM of L2 CAT.
The new level option is introduced to original CAT showing
command in order to show CBM for specified level CAT.
- 'xl psr-cat-show' is updated to show CBM of a domain
according to input cache level.
Examples:
root
This patch implements get HW info flow for CDP including L3 CDP callback
function.
It also changes sysctl function to make it work for CDP.
With this patch, 'psr-hwinfo' can work for L3 CDP.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c| 16
xen/arch/x86/sysctl.c | 24 +
This patch implements get HW info flow for L2 CAT including L2 CAT callback
function.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 14 ++
xen/arch/x86/sysctl.c | 15 +++
xen/include/asm-x86/psr.h | 1 +
xen/include/public/sysctl.h | 6 ++
4 files
This patch implements L3 CDP get value callback function.
With this patch, 'psr-cat-show' can work for L3 CDP.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c
index 99add7a..d0392ca 100
This patch implements xl/xc changes to support get HW info
for L2 CAT.
'xl psr-hwinfo' is updated to show both L3 CAT and L2 CAT
info.
Example(on machine which only supports L2 CAT):
Cache Monitoring Technology (CMT):
Enabled : 0
Cache Allocation Technology (CAT): L3
libxl: error: libxl_p
This patch implements L3 CDP set value related callback functions.
With this patch, 'psr-cat-cbm-set' command can work for L3 CDP.
Signed-off-by: Yi Sun
---
xen/arch/x86/psr.c | 138 +
1 file changed, 138 insertions(+)
diff --git a/xen/arch/x
This patch implements L2 CAT get value callback function and
interface in domctl.
Signed-off-by: Yi Sun
---
xen/arch/x86/domctl.c | 7 +++
xen/arch/x86/psr.c | 16
xen/include/public/domctl.h | 1 +
3 files changed, 24 insertions(+)
diff --git a/xen/arch/x8
This patch implements the xl/xc changes to support set CBM
for L2 CAT.
The new level option is introduced to original CAT setting
command in order to set CBM for specified level CAT.
- 'xl psr-cat-cbm-set' is updated to set cache capacity
bitmasks(CBM) for a domain according to input cache level
This patch adds L2 CAT description in related documents.
Signed-off-by: He Chen
Signed-off-by: Yi Sun
---
docs/man/xl.pod.1.in | 25 ++---
docs/misc/xl-psr.markdown | 10 --
2 files changed, 30 insertions(+), 5 deletions(-)
diff --git a/docs/man/xl.pod.1.in b/d
When EFI booting the Dell OptiPlex 9020, it sometimes GP faults in the
EFI runtime instead of rebooting. Quirk this hardware to use the ACPI
reboot method instead.
dmidecode info:
BIOS Information
Vendor: Dell Inc.
Version: A15
Release Date: 11/08/2015
System Information
Manufactu
>>> On 14.12.16 at 11:43, wrote:
> The movlpd's should be easy to implement. They aren't meaningfully
> different from their integer counterparts in terms of needs for the
> emulator.
Well, the thing here is the increasing complexity of determining
the right size to do the actual memory access w
>>> On 14.12.16 at 12:04, wrote:
> The masking of src.val is common to both paths. Move it later and simplify
> the entry condition for adjusting the memory operand.
>
> Signed-off-by: Andrew Cooper
Reviewed-by: Jan Beulich
___
Xen-devel mailing l
%ss, %fs and %gs can be calculated by directly masking the opcode. %es and
%ds cant, but the calculation isn't hard.
Use seg rather than dst.val for storing the calculated segment, which is
appropriately typed. The mode_64() check can be repositioned and simplified
to drop the ext check. Replac
Replace vmreturn() by vmsucceed(), vmfail(), vmfail_valid() and
vmfail_invalid(), which are consistent to the pseudo code on Intel
SDM, and allow to return VM instruction error numbers to L1
hypervisor.
Signed-off-by: Haozhong Zhang
---
* This patch is based on my patchset "[PATCH v2 0/4] vvmx: f
The assertion about guest paging mode must only apply to guest pagefaults.
This ASSERT() accidentally also trips if Xen takes a pagefault when in HVM
context, such as a copy_to_user() failure in the shadow pagetable code.
Signed-off-by: Andrew Cooper
---
CC: Jan Beulich
---
xen/arch/x86/traps.
... otherwise it returns 0 even if the function fails.
Signed-off-by: Wei Liu
---
Cc: Ian Jackson
This should be backported to 4.8.
---
tools/libxl/libxl_x86_acpi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/libxl/libxl_x86_acpi.c b/tools/libxl/libxl_x86_acpi.c
i
On 14/12/16 11:44, Wei Liu wrote:
> ... otherwise it returns 0 even if the function fails.
Coverity-ID: 1397121
> Signed-off-by: Wei Liu
Reviewed-by: Andrew Cooper
> ---
> Cc: Ian Jackson
>
> This should be backported to 4.8.
> ---
> tools/libxl/libxl_x86_acpi.c | 2 +-
> 1 file changed, 1
On 14/12/16 11:29, Haozhong Zhang wrote:
> Replace vmreturn() by vmsucceed(), vmfail(), vmfail_valid() and
> vmfail_invalid(), which are consistent to the pseudo code on Intel
> SDM, and allow to return VM instruction error numbers to L1
> hypervisor.
>
> Signed-off-by: Haozhong Zhang
> ---
> * Th
On 14/12/16 11:12, Ross Lagerwall wrote:
> When EFI booting the Dell OptiPlex 9020, it sometimes GP faults in the
> EFI runtime instead of rebooting. Quirk this hardware to use the ACPI
> reboot method instead.
>
> dmidecode info:
>
> BIOS Information
> Vendor: Dell Inc.
> Version: A15
>
On 14/12/16 11:13, Jan Beulich wrote:
On 14.12.16 at 11:43, wrote:
>> The movlpd's should be easy to implement. They aren't meaningfully
>> different from their integer counterparts in terms of needs for the
>> emulator.
> Well, the thing here is the increasing complexity of determining
> th
> From: Zhang, Haozhong
> Sent: Wednesday, December 14, 2016 6:12 PM
>
> ... because INVALID_PADDR is a more general one.
>
> Suggested-by: Jan Beulich
> Signed-off-by: Haozhong Zhang
Reviewed-by: Kevin Tian
___
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Hi Andrew,
On 13/12/16 19:39, Andrew Cooper wrote:
On 13/12/16 18:41, Julien Grall wrote:
On 13/12/16 18:28, Andrew Cooper wrote:
On 12/12/16 23:47, Tamas K Lengyel wrote:
Newer versions of VT-x/SVM may provide additional information on a
vmexit, which include a guest physical address relevant
flight 103325 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/103325/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
build-amd64-libvirt 5 libvirt-buildfail REGR. vs. 103284
Tests which
On Wed, Dec 14, 2016 at 11:49:34AM +, Andrew Cooper wrote:
> On 14/12/16 11:44, Wei Liu wrote:
> > ... otherwise it returns 0 even if the function fails.
>
> Coverity-ID: 1397121
>
Does it work this way? Coverity does lead to the discovery of this bug,
but this CID doesn't reveal the bug dir
On 14/12/16 09:37, Jan Beulich wrote:
> Signed-off-by: Jan Beulich
>
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -432,6 +432,7 @@ typedef union {
> #define CR4_OSFXSR (1<<9)
> #define CR4_OSXMMEXCPT (1<<10)
> #define CR4_UMIP (1<<
>>> On 14.12.16 at 12:35, wrote:
> The assertion about guest paging mode must only apply to guest pagefaults.
>
> This ASSERT() accidentally also trips if Xen takes a pagefault when in HVM
> context, such as a copy_to_user() failure in the shadow pagetable code.
>
> Signed-off-by: Andrew Cooper
>>> On 14.12.16 at 12:12, wrote:
> When EFI booting the Dell OptiPlex 9020, it sometimes GP faults in the
> EFI runtime instead of rebooting.
Has it been understood what the #GP is due to? I.e. is it namely
not because of a mis-aligned SSE instruction memory reference?
Jan
Older binutils don't have this at all, and newer may not have it
configured in.
Signed-off-by: Jan Beulich
--- a/build/gen.mk
+++ b/build/gen.mk
@@ -40,6 +40,8 @@ install: install-each-env info.json
@$(INSTALL_DIR) $(DESTDIR)$(xtftestdir)/$(NAME)
$(INSTALL_DATA) info.json $(DESTD
On 14/12/16 13:07, Jan Beulich wrote:
> Older binutils don't have this at all, and newer may not have it
> configured in.
>
> Signed-off-by: Jan Beulich
Reviewed-by: Andrew Cooper , although
>
> --- a/build/gen.mk
> +++ b/build/gen.mk
> @@ -40,6 +40,8 @@ install: install-each-env info.json
>
On 14/12/16 12:58, Jan Beulich wrote:
On 14.12.16 at 12:12, wrote:
>> When EFI booting the Dell OptiPlex 9020, it sometimes GP faults in the
>> EFI runtime instead of rebooting.
> Has it been understood what the #GP is due to? I.e. is it namely
> not because of a mis-aligned SSE instruction m
On 14/12/16 13:10, Andrew Cooper wrote:
> On 14/12/16 13:07, Jan Beulich wrote:
>> Older binutils don't have this at all, and newer may not have it
>> configured in.
>>
>> Signed-off-by: Jan Beulich
>
> Reviewed-by: Andrew Cooper , although
>
>> --- a/build/gen.mk
>> +++ b/build/gen.mk
>> @@ -40,6
>>> On 14.12.16 at 13:36, wrote:
> On 14/12/16 09:37, Jan Beulich wrote:
>> @@ -5205,6 +5206,44 @@ x86_emulate(
>> }
>> break;
>>
>> +case X86EMUL_OPC_F3(0x0f, 0xae): /* Grp15 */
>> +{
>> +unsigned long cr4;
>> +
>> +fail_if(modrm_mod != 3);
>
> This sh
On Fri, Dec 09, 2016 at 01:57:13PM +0100, Daniel Kiper wrote:
> On Tue, Dec 06, 2016 at 11:52:48PM +0100, Daniel Kiper wrote:
> > Hi,
> >
> > This updated patch series adds description of the Multiboot2 protocol new
> > features and fixes some issues found here and there.
> >
> > It applies to mult
On 14/12/16 13:18, Jan Beulich wrote:
On 14.12.16 at 13:36, wrote:
>> On 14/12/16 09:37, Jan Beulich wrote:
>>> @@ -5205,6 +5206,44 @@ x86_emulate(
>>> }
>>> break;
>>>
>>> +case X86EMUL_OPC_F3(0x0f, 0xae): /* Grp15 */
>>> +{
>>> +unsigned long cr4;
>>> +
>
On 14/12/16 13:21, Jan Beulich wrote:
On 14.12.16 at 14:15, wrote:
>> On 14/12/16 12:58, Jan Beulich wrote:
>> On 14.12.16 at 12:12, wrote:
When EFI booting the Dell OptiPlex 9020, it sometimes GP faults in the
EFI runtime instead of rebooting.
>>> Has it been understood what t
alexander.le...@verizon.com writes ("RE: megaraid_sas regression in linux-3.18
[and 1 more messages]"):
> Added 5e5ec1759dd6 to the 3.18 queue, thanks!
How often does this queue get flushed ?
Thanks,
Ian.
___
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Xen-devel@lists.xen
osstest service owner writes ("[linux-3.18 bisection] complete
test-amd64-amd64-xl-qemut-win7-amd64"):
> *** Found and reproduced problem changeset ***
>
> Bug is in tree: linux
> git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
> Bug introduced: a2d8c514753276394d6841
>>> On 14.12.16 at 12:20, wrote:
> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
> @@ -2765,6 +2765,7 @@ x86_emulate(
> if ( mode_64bit() && (op_bytes == 4) )
> op_bytes = 8;
> seg = (b >> 3) & 7;
> +ASSERT(is_x86
>>> On 14.12.16 at 14:28, wrote:
> On 14/12/16 13:18, Jan Beulich wrote:
> On 14.12.16 at 13:36, wrote:
>>> On 14/12/16 09:37, Jan Beulich wrote:
@@ -5205,6 +5206,44 @@ x86_emulate(
}
break;
+case X86EMUL_OPC_F3(0x0f, 0xae): /* Grp15 */
+
On Wed 14-12-16 13:29:56, Ian Jackson wrote:
> osstest service owner writes ("[linux-3.18 bisection] complete
> test-amd64-amd64-xl-qemut-win7-amd64"):
> > *** Found and reproduced problem changeset ***
> >
> > Bug is in tree: linux
> > git://git.kernel.org/pub/scm/linux/kernel/git/stable/lin
On Tue, Dec 13, 2016 at 07:14:27PM -0600, Jiandi An wrote:
> Hi Guys,
>
> Xen currently does not handle mapping of MMIO regions specified under
> OperationRegion in ACPI ASL. OperationRegion is well defined in ACPI
> specification. I'm seeking for architectural direction on adding support for
Hi Stefano
On 09.12.16 21:01, Stefano Stabellini wrote:
> On Fri, 9 Dec 2016, Oleksandr Andrushchenko wrote:
>> On 12/09/2016 03:57 PM, Pasi Kärkkäinen wrote:
>>> On Fri, Dec 09, 2016 at 02:57:04PM +0200, Oleksandr Andrushchenko wrote:
>> Should we have a section on new PV drivers? If so, I s
On 14/12/16 13:39, Jan Beulich wrote:
On 14.12.16 at 14:28, wrote:
>> On 14/12/16 13:18, Jan Beulich wrote:
>> On 14.12.16 at 13:36, wrote:
On 14/12/16 09:37, Jan Beulich wrote:
> @@ -5205,6 +5206,44 @@ x86_emulate(
> }
> break;
>
> +case
On 14/12/16 13:34, Jan Beulich wrote:
On 14.12.16 at 12:20, wrote:
>> --- a/xen/arch/x86/x86_emulate/x86_emulate.c
>> +++ b/xen/arch/x86/x86_emulate/x86_emulate.c
>> @@ -2765,6 +2765,7 @@ x86_emulate(
>> if ( mode_64bit() && (op_bytes == 4) )
>> op_bytes = 8;
>>
On 12/14/16 11:55 +, Andrew Cooper wrote:
On 14/12/16 11:29, Haozhong Zhang wrote:
Replace vmreturn() by vmsucceed(), vmfail(), vmfail_valid() and
vmfail_invalid(), which are consistent to the pseudo code on Intel
SDM, and allow to return VM instruction error numbers to L1
hypervisor.
Signe
On 14/12/16 12:52, Jan Beulich wrote:
On 14.12.16 at 12:35, wrote:
>> The assertion about guest paging mode must only apply to guest pagefaults.
>>
>> This ASSERT() accidentally also trips if Xen takes a pagefault when in HVM
>> context, such as a copy_to_user() failure in the shadow pagetabl
Robert Haas wrote:
> I have not read any database literature on the interaction of
> serializability with subtransactions. This seems very thorny.
> Suppose T1 reads A and B and updates A -> A' while concurrently T2
> reads A and B and updates B -> B'. This is obviously not
> serializable; if ei
The assertion about guest paging mode must only apply to guest pagefaults, as
should the later call to paging_fault().
This ASSERT() accidentally also trips if Xen takes a pagefault when in HVM
context, such as a copy_to_user() failure in the shadow pagetable code.
Merge the ASSERT() into the lat
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