Hi,
On 2016/8/5 5:06, Boris Ostrovsky wrote:
> Signed-off-by: Boris Ostrovsky
> Acked-by: Jan Beulich
> ---
> v2:
> * Minor cleanup of hvmloader's Makefile
>
> tools/firmware/hvmloader/Makefile | 14
> --
> tools/firmware/hvmloader/ovmf.c
On Mon, Aug 15, 2016 at 11:24 AM, Andrew Cooper
wrote:
> On 12/08/16 10:37, Lars Kurth wrote:
>> COPYING file:
>> The motivation of this change is to make it easier for new
>> contributors to conduct a license and patent review, WITHOUT
>> changing any licenses.
>> - Remove references to BSD-style
On Tue, Aug 16, 2016 at 04:13:06PM +0800, Shannon Zhao wrote:
[...]
> Not sure if I do something wrong, but I got bellow errors when compiling
> this series on x86 just using "./autogen.sh;./configure;make tools".
>
> In file included from tcgbios.c:26:0:
> ../util.h:4:39: fatal error: ../hvmloade
flight 100497 qemu-mainline real [real]
http://logs.test-lab.xenproject.org/osstest/logs/100497/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl-arndale 15 guest-start/debian.repeat fail REGR. vs. 100454
Regressions which
This run is configured for baseline tests only.
flight 67536 xen-unstable real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/67536/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
build-i386-rumpuserxen6 xen-build
Along the lines of and on top of
https://lists.xenproject.org/archives/html/xen-devel/2016-08/msg01852.html
here are three more.
1: use DstEax also for {,I}{MUL,DIV}
2: don't open code EFLAGS handling for 2-operand IMUL
3: re-order main 2-byte opcode switch() statement
Signed-off-by: Jan Beulich
Slightly extending the emulate_2op*() macro machinery makes it usable
for IMUL r,r/m too, which has the benefit of smaller source code and
the EFLAGS output being guaranteed to match actual hardware behavior.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/
Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
possible"): While it avoids just a few instructions, we should
nevertheless make use of generic code as much as possible.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emu
This was meant to be numerically sorted (with reasonable exceptions),
but we've manage to diverge from that.
No functional change, only code movement.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -4488,33 +4488,6 @@ x86_
On 2016/8/16 16:29, Wei Liu wrote:
> On Tue, Aug 16, 2016 at 04:13:06PM +0800, Shannon Zhao wrote:
> [...]
>> > Not sure if I do something wrong, but I got bellow errors when compiling
>> > this series on x86 just using "./autogen.sh;./configure;make tools".
>> >
>> > In file included from tcgbi
>>> On 15.08.16 at 16:25, wrote:
> On 15/08/16 09:34, Jan Beulich wrote:
>> @@ -1851,11 +1911,6 @@ x86_emulate(
>> ((op_bytes == 8) ? 4 : op_bytes);
>> else if ( (d & SrcMask) == SrcImmByte )
>> ea.mem.off += 1;
>> -els
On 15/08/16 16:08, Jan Beulich wrote:
On 15.08.16 at 16:25, wrote:
>> On 15/08/16 09:34, Jan Beulich wrote:
>>> @@ -1851,11 +1911,6 @@ x86_emulate(
>>> ((op_bytes == 8) ? 4 : op_bytes);
>>> else if ( (d & SrcMask) == SrcImmByte )
>>>
On Tue, Aug 16, 2016 at 05:36:03PM +0800, Shannon Zhao wrote:
>
>
> On 2016/8/16 16:29, Wei Liu wrote:
> > On Tue, Aug 16, 2016 at 04:13:06PM +0800, Shannon Zhao wrote:
> > [...]
> >> > Not sure if I do something wrong, but I got bellow errors when compiling
> >> > this series on x86 just using "
This run is configured for baseline tests only.
flight 67538 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/67538/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf de74668f5ea713b7e91e01318f0d15d2bf0effce
baseline v
On Wed, 2016-08-10 at 05:47 -0600, Jan Beulich wrote:
> > On 10.08.16 at 12:35, wrote:
> > I observe that CONFIG_NUMA_EMU is also unconditionally true, which
> > offers further cleanup opportunities (albeit it probably a separate
> > patch).
> So I thought, but then wasn't sure eliminating just th
On 15/08/16 17:02, Jan Beulich wrote:
> This should really only be done for XS_TRANSACTION_END messages, or
> else at least some of the xenstore-* tools don't work anymore.
>
> Fixes: 0beef634b8 ("xenbus: don't BUG() on user mode induced condition")
> Reported-by: Richard Schütz
> Cc:
> Signed-o
Hi,
It is a proposition for implementation of grant copy operation in qemu-qdisk
and interface in libxc/libs.
I am sorry for the previous cover letter send today belonging to the previous
version.
Changes since v4:
Interface:
- changed the subject line
- changed the comment in libs/gnttab/inc
On 15/08/16 09:35, Jan Beulich wrote:
> As of commit a800e4f611 ("x86emul: drop pointless and add useful
> default cases") we no longer need the early bailing when "d == 0" (the
> default cases in the main switch() statements take care of that),
> removal of which renders internal_error() wrong and
On Fri, 2016-08-12 at 07:53 -0600, Jan Beulich wrote:
> > > > On 12.08.16 at 03:59, wrote:
> > So, I'm not sure whether the best route here is:
> > - fully backport 6b53bb4ab3c9b;
> > - backport only the last hunk of 6b53bb4ab3c9b as its own patch;
> > - fold the last hunk of 6b53bb4ab3c9b in t
From: Shannon Zhao
Factor MPIDR computing codes out as a helper, so it could be shared
between DT and ACPI.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm.c | 8 +---
tools/libxl/libxl_arm.h | 11 +++
2 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/tools/lib
From: Shannon Zhao
It only constructs the ACPI tables for 64-bit ARM DomU when user enables
acpi because 32-bit DomU doesn't support ACPI.
Signed-off-by: Shannon Zhao
---
tools/libxl/Makefile | 4 +++
tools/libxl/libxl_arm.c | 23 +++-
tools/libxl/libxl_arm.h
From: Shannon Zhao
Copy the static DSDT table into ACPI blob.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tools/libxl/libxl_arm_acpi.c
index cb1c9df..3154e0c 100644
--- a/tools/libxl
From: Shannon Zhao
Rename finalise_one_memory_node to finalise_one_node and pass the node
name via function parameter.
This is useful for adding ACPI module which will be added by a later
patch.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm.c | 8
1 file changed, 4 insertions
From: Shannon Zhao
Estimate the size of ACPI tables and reserve a memory map space for ACPI
tables.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 85
1 file changed, 85 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tool
From: Shannon Zhao
Construct ACPI RSDP table and add a helper to calculate the ACPI table
checksum.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tools/libx
From: Shannon Zhao
Construct GTDT table with the interrupt information of timers.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tools/libxl/libxl_arm_acpi.c
index 8c
From: Shannon Zhao
According to the GIC version, construct the MADT table.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 84
1 file changed, 84 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tools/libxl/libxl_arm_acpi.c
From: Shannon Zhao
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tools/libxl/libxl_arm_acpi.c
index 75dfcc2..cb1c9df 100644
--- a/tools/libxl/libxl_arm_acpi.c
+++ b/tools/l
From: Shannon Zhao
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm_acpi.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/tools/libxl/libxl_arm_acpi.c b/tools/libxl/libxl_arm_acpi.c
index 9432e44..8cd1d9b 100644
--- a/tools/libxl/libxl_arm_acpi.c
+++ b/
From: Shannon Zhao
Add the ARM Multiboot module for ACPI, so UEFI or DomU can get the base
address of ACPI tables from it.
Signed-off-by: Shannon Zhao
---
docs/misc/arm/device-tree/acpi.txt | 24
tools/libxl/libxl_arm.c| 24
2 files
From: Shannon Zhao
While it defines the maximum size of guest ACPI tables in guest
memory layout, here it adds the size to set the target maxmem
to avoid providing less available memory for guest.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm.c | 11 +++
1 file changed, 11 inse
From: Shannon Zhao
Since the existing configuration option "u.hvm.acpi" is x86 specific and
we want to reuse it on ARM as well, add a unified option "acpi" for
x86 and ARM, and for ARM it's disabled by default.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_create.c | 9 -
tools/li
> From: Corey Minyard [mailto:cminy...@mvista.com]
> Sent: Tuesday, August 16, 2016 3:02 AM
> On 08/15/2016 12:06 PM, Corey Minyard wrote:
> > On 08/15/2016 06:35 AM, 河合英宏 / KAWAI，HIDEHIRO wrote:
> >> Hi Corey,
> >>
> >>> From: Corey Minyard [mailto:cminy...@mvista.com]
> >>> Sent: Friday, August 1
From: Shannon Zhao
It uses static DSDT table like the way x86 uses. Currently the DSDT
table only contains processor device objects and it generates the
maximal objects which so far is 128.
Also only check iasl for aarch64 in configure since ACPI on ARM32 is not
supported.
Signed-off-by: Shanno
From: Shannon Zhao
The guest kernel will get the event channel interrupt information via
domain param HVM_PARAM_CALLBACK_IRQ. Initialize it here.
Signed-off-by: Shannon Zhao
---
tools/libxl/libxl_arm.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/tools/libxl/libxl_arm.c b
From: Shannon Zhao
Add macros for HVM_PARAM_CALLBACK_TYPE_PPI operation values and update
them in evtchn_fixup().
Signed-off-by: Shannon Zhao
---
xen/arch/arm/domain_build.c | 8 +---
xen/include/public/hvm/params.h | 4
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git
From: Shannon Zhao
The design of this feature is described as below.
Firstly, the toolstack (libxl) generates the ACPI tables according the
number of vcpus and gic controller.
Then, it copies these ACPI tables to DomU non-RAM memory map space and
passes them to UEFI firmware through the "ARM mul
flight 100499 xen-4.7-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/100499/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
test-amd64-amd64-xl-credit2 19 guest-start/debian.repeat fail in 100491 pass
in 100499
test-armhf-armhf-xl-
On 15/08/16 09:35, Jan Beulich wrote:
> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
> possible"): While it avoids just a few instructions, we should
> nevertheless make use of generic code as much as possible. Here we can
> arrange for that by simply swapping source and destinat
>>> On 16.08.16 at 12:21, wrote:
> On Fri, 2016-08-12 at 07:53 -0600, Jan Beulich wrote:
>> Same
>> for 4.5 then, were the backport adjusted for 4.6 then applied
>> cleanly.
>>
> So, you've done the backports yourself, and you don't want/need me to
> do them right?
Indeed.
> I'm asking because
>>> On 16.08.16 at 12:12, wrote:
> On 15/08/16 09:35, Jan Beulich wrote:
>> As of commit a800e4f611 ("x86emul: drop pointless and add useful
>> default cases") we no longer need the early bailing when "d == 0" (the
>> default cases in the main switch() statements take care of that),
>> removal of
>>> On 16.08.16 at 12:59, wrote:
> On 15/08/16 09:35, Jan Beulich wrote:
>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
>> possible"): While it avoids just a few instructions, we should
>> nevertheless make use of generic code as much as possible. Here we can
>> arrange for tha
On 16/08/16 12:31, Jan Beulich wrote:
On 16.08.16 at 12:59, wrote:
>> On 15/08/16 09:35, Jan Beulich wrote:
>>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
>>> possible"): While it avoids just a few instructions, we should
>>> nevertheless make use of generic code as much
On Mon, Aug 15, 2016 at 6:50 PM, Wei Liu wrote:
> Blktap2 is effectively dead code for a few years.
>
> Notable changes in this patch:
>
> 0. Unhook blktap2 from build system
> 1. Now libxl no longer supports TAP ask backend, appropriate assertions
>
s/ask/disk/
are added and some code paths
>>> On 16.08.16 at 14:46, wrote:
> On 16/08/16 12:31, Jan Beulich wrote:
> On 16.08.16 at 12:59, wrote:
>>> On 15/08/16 09:35, Jan Beulich wrote:
Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
possible"): While it avoids just a few instructions, we should
never
On 12/07/16 10:02, Yu Zhang wrote:
> This patch resets p2m_ioreq_server entries back to p2m_ram_rw,
> after an ioreq server has unmapped. The resync is done both
> asynchronously with the current p2m_change_entry_type_global()
> interface, and synchronously by iterating the p2m table. The
> synchro
On 16/08/16 12:27, Jan Beulich wrote:
On 16.08.16 at 12:12, wrote:
>> On 15/08/16 09:35, Jan Beulich wrote:
>>> As of commit a800e4f611 ("x86emul: drop pointless and add useful
>>> default cases") we no longer need the early bailing when "d == 0" (the
>>> default cases in the main switch() st
Certain opcodes would so far not have got #UD when a LOCK prefix was
present. Adjust this by
- moving the too early generic check into destination operand decoding,
where DstNone and DstReg already have respective handling
- switching source and destination of TEST r,r/m, for it to be taken
car
>>> On 16.08.16 at 15:35, wrote:
> Although really, it seems like having a "p2m_finish_type_change()"
> function which looked for misconfigured entries and reset them would be
> a step closer to the right direction, in that it could be re-used in
> other situations where the type change may not ha
Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
possible"): While it avoids just a few instructions, we should
nevertheless make use of generic code as much as possible. Here we can
arrange for that by simply introducing SrcEax (which requires no other
code adjustments).
Signed-off
On 16/08/16 10:32, Jan Beulich wrote:
> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
> possible"): While it avoids just a few instructions, we should
> nevertheless make use of generic code as much as possible.
>
> Signed-off-by: Jan Beulich
This does reduce the amount of code,
On 16/08/16 10:33, Jan Beulich wrote:
> Slightly extending the emulate_2op*() macro machinery makes it usable
> for IMUL r,r/m too, which has the benefit of smaller source code and
> the EFLAGS output being guaranteed to match actual hardware behavior.
>
> Signed-off-by: Jan Beulich
Reviewed-by:
On 16/08/16 10:34, Jan Beulich wrote:
> This was meant to be numerically sorted (with reasonable exceptions),
> but we've manage to diverge from that.
>
> No functional change, only code movement.
>
> Signed-off-by: Jan Beulich
Reviewed-by: Andrew Cooper
_
On 16/08/16 14:51, Jan Beulich wrote:
> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
> possible"): While it avoids just a few instructions, we should
> nevertheless make use of generic code as much as possible. Here we can
> arrange for that by simply introducing SrcEax (which re
>>> On 16.08.16 at 16:32, wrote:
> On 16/08/16 14:51, Jan Beulich wrote:
>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
>> possible"): While it avoids just a few instructions, we should
>> nevertheless make use of generic code as much as possible. Here we can
>> arrange for tha
On 16/08/16 15:50, Jan Beulich wrote:
On 16.08.16 at 16:32, wrote:
>> On 16/08/16 14:51, Jan Beulich wrote:
>>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
>>> possible"): While it avoids just a few instructions, we should
>>> nevertheless make use of generic code as much
>>> On 16.08.16 at 16:08, wrote:
> On 16/08/16 10:32, Jan Beulich wrote:
>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
>> possible"): While it avoids just a few instructions, we should
>> nevertheless make use of generic code as much as possible.
>>
>> Signed-off-by: Jan Beuli
On 16/08/16 14:51, Jan Beulich wrote:
> Certain opcodes would so far not have got #UD when a LOCK prefix was
> present. Adjust this by
> - moving the too early generic check into destination operand decoding,
> where DstNone and DstReg already have respective handling
> - switching source and des
On 16/08/16 15:57, Jan Beulich wrote:
On 16.08.16 at 16:08, wrote:
>> On 16/08/16 10:32, Jan Beulich wrote:
>>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
>>> possible"): While it avoids just a few instructions, we should
>>> nevertheless make use of generic code as much
User mode code generally cannot be expected to invoke the PV-enabled
CPUID Xen supports, and prior to the CPUID levelling changes for 4.7
(as well as even nowadays on levelling incapable hardware) such CPUID
invocations actually saw the host CR4.OSXSAVE value. Fold in the guest
view of CR4.OSXSAVE
Hi,
I'm Sunny Raj, and this is the first time I'm posting to xen-devel. I'm a
research student currently working on some aspects of virtual machine
introspection. Specifically, instead of introspecting the VM directly, I
use remus to checkpoint the VM to a backup on to the localhost, and run
intro
>>> On 16.08.16 at 17:11, wrote:
> On 16/08/16 15:57, Jan Beulich wrote:
> On 16.08.16 at 16:08, wrote:
>>> On 16/08/16 10:32, Jan Beulich wrote:
Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
possible"): While it avoids just a few instructions, we should
never
On 16/08/16 16:20, Jan Beulich wrote:
> User mode code generally cannot be expected to invoke the PV-enabled
> CPUID Xen supports, and prior to the CPUID levelling changes for 4.7
> (as well as even nowadays on levelling incapable hardware) such CPUID
> invocations actually saw the host CR4.OSXSAVE
>>> On 16.08.16 at 17:41, wrote:
> On 16/08/16 16:20, Jan Beulich wrote:
>> User mode code generally cannot be expected to invoke the PV-enabled
>> CPUID Xen supports, and prior to the CPUID levelling changes for 4.7
>> (as well as even nowadays on levelling incapable hardware) such CPUID
>> invoc
flight 100515 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/100515/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 12 migrate-support-checkfail never pass
test-armhf-armhf-xl 1
>>> On 16.08.16 at 17:23, wrote:
On 16.08.16 at 17:11, wrote:
>> On 16/08/16 15:57, Jan Beulich wrote:
>> On 16.08.16 at 16:08, wrote:
On 16/08/16 10:32, Jan Beulich wrote:
> Just like said in commit c0bc0adf24 ("x86emul: use DstEax where
> possible"): While it avoids just
On 16/08/16 17:00, Jan Beulich wrote:
On 16.08.16 at 17:41, wrote:
>> On 16/08/16 16:20, Jan Beulich wrote:
>>> User mode code generally cannot be expected to invoke the PV-enabled
>>> CPUID Xen supports, and prior to the CPUID levelling changes for 4.7
>>> (as well as even nowadays on levell
On 16/08/16 17:07, Jan Beulich wrote:
On 16.08.16 at 17:23, wrote:
> On 16.08.16 at 17:11, wrote:
>>> On 16/08/16 15:57, Jan Beulich wrote:
>>> On 16.08.16 at 16:08, wrote:
> On 16/08/16 10:32, Jan Beulich wrote:
>> Just like said in commit c0bc0adf24 ("x86emul: use DstEax w
flight 67540 distros-debian-snapshot real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/67540/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-i386-i386-current-netinst-pygrub 10 guest-start fail REGR. vs. 66946
Regr
Hi Stefano,
On 16/08/2016 01:21, Stefano Stabellini wrote:
On Thu, 28 Jul 2016, Julien Grall wrote:
A follow-up patch will add more case to the switch that will require the
IPA. So move the computation out of the switch.
Signed-off-by: Julien Grall
---
xen/arch/arm/traps.c | 36 +
Hi Andre,
Do you plan to send a new version of this series?
Cheers,
On 20/06/2016 16:09, Andre Przywara wrote:
These patches allow to include a Xen hypervisor binary into a boot-wrapper
ELF file, so that a Foundation Platform or a Fast Model can boot a Xen
system (including a Dom0 kernel).
Thi
flight 100501 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/100501/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl 6 xen-boot fail REGR. vs. 100488
test-amd64-i386-xl
flight 100505 ovmf real [real]
http://logs.test-lab.xenproject.org/osstest/logs/100505/
Perfect :-)
All tests in this flight passed as required
version targeted for testing:
ovmf d35ec1e0507dc612ed6485410f12e683a726a3bf
baseline version:
ovmf de74668f5ea713b7e91e0
On 08/11/2016 10:51 AM, Jan Beulich wrote:
On 11.08.16 at 16:37, wrote:
On Aug 11, 2016 06:02, "Jan Beulich" wrote:
On 10.08.16 at 17:00, wrote:
@@ -5238,18 +5238,19 @@ static int do_altp2m_op(
goto out;
}
-if ( (rc = xsm_hvm_altp2mhvm_op(XSM_TARGET, d)) )
+if ( !d-
On 08/11/2016 07:33 AM, Jan Beulich wrote:
On 05.08.16 at 13:20, wrote:
Daniel,
I've only now realized that I forgot to Cc you on this v2.
Jan
Qemu needs access to this for the domain it controls, both due to it
being used by xc_domain_memory_mapping() (which qemu calls) and the
explicit u
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Substituted the call to tlb_flush for p2m_flush_table.
Added comments.
Cosmetic fixes.
v3: Changed the locking mechanism to "p2m_write_lock" inside the
function "altp2m_destroy_by_id".
Do not fl
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Dump p2m information of the hostp2m and all altp2m views.
---
xen/arch/arm/p2m.c | 20
1 file changed, 20 insertions(+)
diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index dea3038..8
The HVMOP_altp2m_set_domain_state allows to activate altp2m on a
specific domain. This commit adopts the x86
HVMOP_altp2m_set_domain_state implementation.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v2: Dynamically allocate memory for altp2m views only when n
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3: Extended the function "altp2m_switch_domain_altp2m_by_id" so that if
the guest domain indirectly calles this function, the current vcpu also
changes the altp2m view without performing an explicit context
This commit adds the functionality to change mfn mappings for specified
gfn's in altp2m views. This mechanism can be used within the context of
VMI, e.g., to establish stealthy debugging.
Signed-off-by: Sergej Proskurin
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Cc: Stefano Stabellini
Cc: Julien Grall
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v3: Moved the altp2m_lock t
The p2m initialization now invokes initialization routines responsible
for the allocation and initialization of altp2m structures. The same
applies to teardown routines. The functionality has been adopted from
the x86 altp2m implementation.
Signed-off-by: Sergej Proskurin
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Cc: Stefano Stabelli
This commit extends xen-access by a simple test of the functionality
provided by "xc_altp2m_change_gfn". The idea is to dynamically remap a
trapping gfn to another mfn, which holds the same content as the
original mfn. On success, the guest will continue to run. Subsequent
altp2m access violations
With the introduction of altp2m, many functions have been adapted to
receive an argument of type "struct p2m_domain*" instead of "struct
domain*". A backpointer to the associated domain within the "struct
p2m_domain*" reduces the number of function parameters without losing
the accessibility of the
This commit moves code in the functions
"do_trap_data_(instr|abort)_guest" without changing the original
functionality. The code movement is limited to moving the struct npfec
out of the switch statements in both functions. This commit acts as a
basis for the following commit implementing the altp2
This commit introduces the macro "p2m_get_active_p2m" returning the
currently active (alt)p2m. The need for this macro will be shown in the
following commits.
Signed-off-by: Sergej Proskurin
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Cc: Stefano Stabellini
Cc: Julien Grall
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xen/arch/arm/p2m.c | 3 +++
1 file changed, 3 insertion
Freeing p2m entries of arbitrary p2m's (in particular in alternate
p2m's) will lead to unpredicted behavior as the entries might still be
used within the host's p2m. The host's p2m should, however, free the
entries, as it is the main instance responsible for their management. If
entries were freed
The function get_page_from_gva uses ARM's hardware support to translate
gva's to machine addresses. This function is used, among others, for
memory regulation purposes, e.g, within the context of memory ballooning.
To ensure correct behavior while altp2m is in use, we use the host's p2m
table for t
This commit adapts the function "p2m_restore_state" in a way that the
currently active altp2m table is considered during state restoration.
Signed-off-by: Sergej Proskurin
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Cc: Stefano Stabellini
Cc: Julien Grall
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v3: Moved declaration of "altp2m_switch_domain_altp2m_by_id" out of this
From: Tamas K Lengyel
Currently setting altp2mhvm=1 in the domain configuration allows access to the
altp2m interface for both in-guest and external privileged tools. This poses
a problem for use-cases where only external access should be allowed, requiring
the user to compile Xen with XSM enable
This commit changes the prototype and implementation of the functions
"p2m_alloc_vmid" and "p2m_free_vmid". The function "p2m_alloc_vmid" does
not expect the struct domain as argument anymore and returns an
allocated vmid. The function "p2m_free_vmid" takes only the vmid that is
to be freed as argu
The function "p2m_alloc_table" should be able to allocate 2nd stage
translation tables not only for the host's p2m but also for alternate
p2m's.
Signed-off-by: Sergej Proskurin
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Cc: Stefano Stabellini
Cc: Julien Grall
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v2: Removed altp2m table initialization from "p2m_table_init".
v3: Re
This commit adds a p2m class to the struct p2m_domain to distinguish
between the host's original p2m and alternate p2m's. The need for this
functionality will be shown in the following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/include/asm-arm/
This commit makes sure that the page reference count is updated through
the function "p2m_put_l3_page" only the entries have been freed from the
hosts's p2m.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/arch/arm/p2m.c | 2 +-
1 file changed, 1 insertion(+
This commit introduces the following functions:
* remove_altp2m_entry
* modify_altp2m_entry
These functions are responsible to manage an altp2m view's entries and
their attributes.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
v3: Changed the function prototyp
This commit introduces the function "altp2m_propagate_change" that is
responsible to propagate changes applied to the host's p2m to a specific
or even all altp2m views. In this way, Xen can in-/decrease the guest's
physmem at run-time without leaving the altp2m views with
stalled/invalid entries.
This commit does not change or introduce any additional functionality
but rather is a part of the following commit that alters the
functionality of the function "p2m_alloc_vmid".
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc: Julien Grall
---
xen/arch/arm/p2m.c | 12 ++-
This commit substitutes the direct access of the host's p2m
(&d->arch.p2m) for the macro "p2m_get_hostp2m". This macro simplifies
the differentiation between the host's p2m and introduced alternative
p2m's, in the following commits.
Signed-off-by: Sergej Proskurin
---
Cc: Stefano Stabellini
Cc:
This commit pulls out generic init/teardown functionality out of
"p2m_init" and "p2m_teardown" into "p2m_init_one", "p2m_teardown_one",
and "p2m_flush_table" functions. This allows our future implementation
to reuse existing code for the initialization/teardown of altp2m views.
Signed-off-by: Ser
This commit adds the function "altp2m_switch_vcpu_altp2m_by_id" that is
executed after checking whether the vcpu should be switched to a
different altp2m within the function "altp2m_check".
Please note that in this commit, the function "p2m_altp2m_check" is
renamed to "altp2m_check" and moved from
This commit introduces macros for switching and restoring the vttbr
considering the currently set irq flags. We define these macros, as the
following commits will use the associated functionality multiple times
throughout the file ./xen/arch/arm/p2m.c.
Signed-off-by: Sergej Proskurin
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Cc: Stef
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