On Wed, 2016-12-14 at 03:39 +0100, George Dunlap wrote:
> > On Dec 10, 2016, at 4:18 AM, Stefano Stabellini > .org> wrote:
> > > > The issue with spreading interrupts migrations over time is
> > > > that it makes
> > > > interrupt latency less deterministic. It is OK, in the uncommon
> > > > case
> On Dec 10, 2016, at 4:18 AM, Stefano Stabellini
> wrote:
>
> On Fri, 9 Dec 2016, Andre Przywara wrote:
>> On 07/12/16 20:20, Stefano Stabellini wrote:
>>> On Tue, 6 Dec 2016, Julien Grall wrote:
On 06/12/2016 22:01, Stefano Stabellini wrote:
> On Tue, 6 Dec 2016, Stefano Stabellini w
On Mon, 12 Dec 2016, Andre Przywara wrote:
> >> The _pending_ table is exactly that: one bit per VLPI.
> >
> > Actually the spec says about the pending table, ch 6.1.2:
> >
> > "Each Redistributor maintains entries in a separate LPI Pending table
> > that indicates the pending state of each LPI w
Hi Stefano,
thanks for the prompt and helpful answer!
On 10/12/16 00:30, Stefano Stabellini wrote:
> On Fri, 9 Dec 2016, Andre Przywara wrote:
I've been spending some time thinking about this, and I think we can in
fact get away without ever propagating command from domains to the host.
On Fri, 9 Dec 2016, Andre Przywara wrote:
> >> I've been spending some time thinking about this, and I think we can in
> >> fact get away without ever propagating command from domains to the host.
> >>
> >> I made a list of all commands that possible require host ITS command
> >> propagation. There
On Fri, 9 Dec 2016, Andre Przywara wrote:
> On 07/12/16 20:20, Stefano Stabellini wrote:
> > On Tue, 6 Dec 2016, Julien Grall wrote:
> >> On 06/12/2016 22:01, Stefano Stabellini wrote:
> >>> On Tue, 6 Dec 2016, Stefano Stabellini wrote:
> moving a vCPU with interrupts assigned to it is slower
On Fri, 9 Dec 2016, Julien Grall wrote:
> Hi Stefano,
>
> On 07/12/16 20:20, Stefano Stabellini wrote:
> > On Tue, 6 Dec 2016, Julien Grall wrote:
> > > On 06/12/2016 22:01, Stefano Stabellini wrote:
> > > > On Tue, 6 Dec 2016, Stefano Stabellini wrote:
> > > > > moving a vCPU with interrupts assi
On 03/12/16 00:46, Stefano Stabellini wrote:
> On Fri, 2 Dec 2016, Andre Przywara wrote:
>> Hi,
Hi Stefano,
I started to answer this email some days ago, but then spend some time
on actually implementing what I suggested, hence the delay ...
>>
>> sorry for chiming in late
>>
>> I've been s
Hi,
On 07/12/16 20:20, Stefano Stabellini wrote:
> On Tue, 6 Dec 2016, Julien Grall wrote:
>> On 06/12/2016 22:01, Stefano Stabellini wrote:
>>> On Tue, 6 Dec 2016, Stefano Stabellini wrote:
moving a vCPU with interrupts assigned to it is slower than moving a
vCPU without interrupts assi
Hi Stefano,
On 07/12/16 20:20, Stefano Stabellini wrote:
On Tue, 6 Dec 2016, Julien Grall wrote:
On 06/12/2016 22:01, Stefano Stabellini wrote:
On Tue, 6 Dec 2016, Stefano Stabellini wrote:
moving a vCPU with interrupts assigned to it is slower than moving a
vCPU without interrupts assigned t
On Wed, 2016-12-07 at 12:21 -0800, Stefano Stabellini wrote:
> On Tue, 6 Dec 2016, Dario Faggioli wrote:
> > E.g., if I have pCPU 0 loaded at 75% and pCPU 1 loaded at 25%, vCPU
> > A
> > has a lot of routed interrupts, and moving it gives me perfect load
> > balancing (i.e., load will become 50% on
On Tue, 6 Dec 2016, Dario Faggioli wrote:
> On Tue, 2016-12-06 at 13:53 -0800, Stefano Stabellini wrote:
> > On Tue, 6 Dec 2016, Dario Faggioli wrote:
> > > Sorry if I can't be more useful than this for now. :-/
> >
> > We don't need scheduler support to implement interrupt migration. The
> > ques
On Tue, 6 Dec 2016, Julien Grall wrote:
> On 06/12/2016 22:01, Stefano Stabellini wrote:
> > On Tue, 6 Dec 2016, Stefano Stabellini wrote:
> > > moving a vCPU with interrupts assigned to it is slower than moving a
> > > vCPU without interrupts assigned to it. You could say that the
> > > slowness i
On Tue, 2016-12-06 at 23:24 +, Julien Grall wrote:
> I really think we should make the vCPU migration much simpler (e.g
> avoid
> this big loop over interrupt). In fine, if we really expect the
> scheduler to migrate the vCPU on a different pCPU. We should also
> expect
> receiving the inter
Hi Dario,
On 06/12/2016 22:39, Dario Faggioli wrote:
On Tue, 2016-12-06 at 13:53 -0800, Stefano Stabellini wrote:
On Tue, 6 Dec 2016, Dario Faggioli wrote:
Sorry if I can't be more useful than this for now. :-/
We don't need scheduler support to implement interrupt migration. The
question wa
Hi Stefano,
On 06/12/2016 22:01, Stefano Stabellini wrote:
On Tue, 6 Dec 2016, Stefano Stabellini wrote:
moving a vCPU with interrupts assigned to it is slower than moving a
vCPU without interrupts assigned to it. You could say that the
slowness is directly proportional do the number of interru
On Tue, 2016-12-06 at 13:53 -0800, Stefano Stabellini wrote:
> On Tue, 6 Dec 2016, Dario Faggioli wrote:
> > Sorry if I can't be more useful than this for now. :-/
>
> We don't need scheduler support to implement interrupt migration. The
> question was much simpler than that: moving a vCPU with in
On Tue, 2016-12-06 at 14:01 -0800, Stefano Stabellini wrote:
> On Tue, 6 Dec 2016, Stefano Stabellini wrote:
> >
> > moving a vCPU with interrupts assigned to it is slower than moving
> > a
> > vCPU without interrupts assigned to it. You could say that the
> > slowness is directly proportional do
On Tue, 6 Dec 2016, Stefano Stabellini wrote:
> moving a vCPU with interrupts assigned to it is slower than moving a
> vCPU without interrupts assigned to it. You could say that the
> slowness is directly proportional do the number of interrupts assigned
> to the vCPU.
To be pedantic, by "assigned
On Tue, 6 Dec 2016, Dario Faggioli wrote:
> On Tue, 2016-12-06 at 11:36 -0800, Stefano Stabellini wrote:
> > On Tue, 6 Dec 2016, Julien Grall wrote:
> > >
> > > > Another approach is to let the scheduler know that migration is
> > > > slower.
> > > > In fact this is not a new problem: it can be sl
On Mon, 2016-12-05 at 11:51 -0800, Stefano Stabellini wrote:
> Another approach is to let the scheduler know that migration is
> slower.
> In fact this is not a new problem: it can be slow to migrate
> interrupts,
> even few non-LPIs interrupts, even on x86. I wonder if the Xen
> scheduler
> has an
On Tue, 2016-12-06 at 11:36 -0800, Stefano Stabellini wrote:
> On Tue, 6 Dec 2016, Julien Grall wrote:
> >
> > > Another approach is to let the scheduler know that migration is
> > > slower.
> > > In fact this is not a new problem: it can be slow to migrate
> > > interrupts,
> > > even few non-LPI
On Tue, 6 Dec 2016, Julien Grall wrote:
> > > This window may be bigger with LPIs, because a single vCPU may have
> > > thousand
> > > interrupts routed. This would take a long time to move all of them when
> > > the
> > > vCPU is migrating. So we may want to take a lazy approach and moving them
>
Hi Stefano,
On 05/12/16 19:51, Stefano Stabellini wrote:
On Mon, 5 Dec 2016, Julien Grall wrote:
Hi Stefano,
On 03/12/16 00:46, Stefano Stabellini wrote:
On Fri, 2 Dec 2016, Andre Przywara wrote:
When we receive the maintenance interrupt and we clear the LR of the
vLPI, Xen should re-enable
On Mon, 5 Dec 2016, Julien Grall wrote:
> Hi Stefano,
>
> On 03/12/16 00:46, Stefano Stabellini wrote:
> > On Fri, 2 Dec 2016, Andre Przywara wrote:
> > > > When we receive the maintenance interrupt and we clear the LR of the
> > > > vLPI, Xen should re-enable the pLPI.
> > > > Given that the stat
Hi Stefano,
On 03/12/16 00:46, Stefano Stabellini wrote:
On Fri, 2 Dec 2016, Andre Przywara wrote:
When we receive the maintenance interrupt and we clear the LR of the
vLPI, Xen should re-enable the pLPI.
Given that the state of the LRs is sync'ed before calling gic_interrupt,
we can be sure to
On Fri, 2 Dec 2016, Andre Przywara wrote:
> Hi,
>
> sorry for chiming in late
>
> I've been spending some time thinking about this, and I think we can in
> fact get away without ever propagating command from domains to the host.
>
> I made a list of all commands that possible require host I
Hi,
sorry for chiming in late
I've been spending some time thinking about this, and I think we can in
fact get away without ever propagating command from domains to the host.
I made a list of all commands that possible require host ITS command
propagation. There are two groups:
1: enabling/
On Fri, 25 Nov 2016, Julien Grall wrote:
> Hi,
>
> On 18/11/16 18:39, Stefano Stabellini wrote:
> > On Fri, 11 Nov 2016, Stefano Stabellini wrote:
> > > On Fri, 11 Nov 2016, Julien Grall wrote:
> > > > On 10/11/16 20:42, Stefano Stabellini wrote:
> > > > That's why in the approach we had on the pr
Hi,
On 18/11/16 18:39, Stefano Stabellini wrote:
On Fri, 11 Nov 2016, Stefano Stabellini wrote:
On Fri, 11 Nov 2016, Julien Grall wrote:
On 10/11/16 20:42, Stefano Stabellini wrote:
That's why in the approach we had on the previous series was "host ITS command
should be limited when emulating
On Fri, 11 Nov 2016, Stefano Stabellini wrote:
> On Fri, 11 Nov 2016, Julien Grall wrote:
> > Hi Stefano,
> >
> > On 10/11/16 20:42, Stefano Stabellini wrote:
> > > On Thu, 10 Nov 2016, Julien Grall wrote:
> > > > On 10/11/16 00:21, Stefano Stabellini wrote:
> > > > > On Fri, 4 Nov 2016, Andre Prz
On Fri, 11 Nov 2016, Julien Grall wrote:
> Hi Stefano,
>
> On 10/11/16 20:42, Stefano Stabellini wrote:
> > On Thu, 10 Nov 2016, Julien Grall wrote:
> > > On 10/11/16 00:21, Stefano Stabellini wrote:
> > > > On Fri, 4 Nov 2016, Andre Przywara wrote:
> > > > > On 24/10/16 16:32, Vijay Kilari wrote:
Hi Stefano,
On 10/11/16 20:42, Stefano Stabellini wrote:
On Thu, 10 Nov 2016, Julien Grall wrote:
On 10/11/16 00:21, Stefano Stabellini wrote:
On Fri, 4 Nov 2016, Andre Przywara wrote:
On 24/10/16 16:32, Vijay Kilari wrote:
On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara
AFAIK, the
On Thu, 10 Nov 2016, Julien Grall wrote:
> Hi,
>
> On 10/11/16 00:21, Stefano Stabellini wrote:
> > On Fri, 4 Nov 2016, Andre Przywara wrote:
> > > On 24/10/16 16:32, Vijay Kilari wrote:
> > > > On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara
> > > > wrote:
> > > > > The INVALL command instructs
Hi,
On 10/11/16 00:21, Stefano Stabellini wrote:
On Fri, 4 Nov 2016, Andre Przywara wrote:
On 24/10/16 16:32, Vijay Kilari wrote:
On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara wrote:
The INVALL command instructs an ITS to invalidate the configuration
data for all LPIs associated with a gi
On Fri, 4 Nov 2016, Andre Przywara wrote:
> Hi,
>
> On 24/10/16 16:32, Vijay Kilari wrote:
> > On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara
> > wrote:
> >> The INVALL command instructs an ITS to invalidate the configuration
> >> data for all LPIs associated with a given redistributor (read:
Hi,
On 24/10/16 16:32, Vijay Kilari wrote:
> On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara
> wrote:
>> The INVALL command instructs an ITS to invalidate the configuration
>> data for all LPIs associated with a given redistributor (read: VCPU).
>> To avoid iterating (and mapping!) all guest ta
On Wed, Sep 28, 2016 at 11:54 PM, Andre Przywara wrote:
> The INVALL command instructs an ITS to invalidate the configuration
> data for all LPIs associated with a given redistributor (read: VCPU).
> To avoid iterating (and mapping!) all guest tables, we instead go through
> the host LPI table to
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