>>> On 27.05.15 at 17:18, wrote:
> On 05/27/2015 10:26 AM, Jan Beulich wrote:
> On 27.05.15 at 15:44, wrote:
>>> Sorry, I meant amd/intel members of the union below (I forgot we were
>>> already in the arch header file):
>>>
>>> +/*
>>> + * Vendor-specific PMU registers.
>>> + * R
On 05/27/2015 10:26 AM, Jan Beulich wrote:
On 27.05.15 at 15:44, wrote:
Sorry, I meant amd/intel members of the union below (I forgot we were
already in the arch header file):
+/*
+ * Vendor-specific PMU registers.
+ * RW for both hypervisor and guest.
+ * Guest's updates to th
>>> On 27.05.15 at 15:44, wrote:
> Sorry, I meant amd/intel members of the union below (I forgot we were
> already in the arch header file):
>
> +/*
> + * Vendor-specific PMU registers.
> + * RW for both hypervisor and guest.
> + * Guest's updates to this field are verified and t
On 05/27/2015 08:28 AM, Jan Beulich wrote:
On 26.05.15 at 19:50, wrote:
On 05/26/2015 12:13 PM, Jan Beulich wrote:
On 21.05.15 at 19:57, wrote:
+ * guest when PMU_CACHED bit in pmu_flags is set (which is done by the
+ * hypervisor during PMU interrupt). Hypervisor will read updated data in
+
>>> On 26.05.15 at 19:50, wrote:
> On 05/26/2015 12:13 PM, Jan Beulich wrote:
> On 21.05.15 at 19:57, wrote:
>>>
>>> + * guest when PMU_CACHED bit in pmu_flags is set (which is done by the
>>> + * hypervisor during PMU interrupt). Hypervisor will read updated data in
>>> + * XENPMU_flush hype
On 05/26/2015 12:13 PM, Jan Beulich wrote:
On 21.05.15 at 19:57, wrote:
+ * guest when PMU_CACHED bit in pmu_flags is set (which is done by the
+ * hypervisor during PMU interrupt). Hypervisor will read updated data in
+ * XENPMU_flush hypercall and clear PMU_CACHED bit.
+ */
+struct xen_pmu_a
>>> On 21.05.15 at 19:57, wrote:
> --- a/xen/include/public/arch-arm.h
> +++ b/xen/include/public/arch-arm.h
> @@ -434,6 +434,11 @@ struct xen_arch_domainconfig {
>
> #endif
>
> +#ifndef __ASSEMBLY__
> +/* Stub definition of PMU structure */
> +typedef struct xen_pmu_arch {} xen_pmu_arch_t;
