>>> On 17.06.15 at 11:36, wrote:
> On 17/06/15 07:29, Jan Beulich wrote:
> On 16.06.15 at 20:26, wrote:
>>> It turns out that MSR_AMD64_NB_CFG is unconditionally RAZ and has all
>>> writes discarded, so no HVM guest will ever be in a position to
>>> legitimately use AMD extended configuration
On 17/06/15 07:29, Jan Beulich wrote:
On 16.06.15 at 20:26, wrote:
>> On 16/06/15 09:09, Jan Beulich wrote:
>> On 15.06.15 at 17:32, wrote:
On 15/06/15 15:30, Jan Beulich wrote:
> @@ -2439,9 +2434,19 @@ struct hvm_ioreq_server *hvm_select_iore
>
> type = IOREQ
>>> On 16.06.15 at 20:26, wrote:
> On 16/06/15 09:09, Jan Beulich wrote:
> On 15.06.15 at 17:32, wrote:
>>> On 15/06/15 15:30, Jan Beulich wrote:
@@ -2439,9 +2434,19 @@ struct hvm_ioreq_server *hvm_select_iore
type = IOREQ_TYPE_PCI_CONFIG;
addr = ((uint
On 16/06/15 09:09, Jan Beulich wrote:
On 15.06.15 at 17:32, wrote:
>> On 15/06/15 15:30, Jan Beulich wrote:
>>> @@ -2439,9 +2434,19 @@ struct hvm_ioreq_server *hvm_select_iore
>>>
>>> type = IOREQ_TYPE_PCI_CONFIG;
>>> addr = ((uint64_t)sbdf << 32) |
>>> - CF8
>>> On 15.06.15 at 17:32, wrote:
> On 15/06/15 15:30, Jan Beulich wrote:
>> @@ -2439,9 +2434,19 @@ struct hvm_ioreq_server *hvm_select_iore
>>
>> type = IOREQ_TYPE_PCI_CONFIG;
>> addr = ((uint64_t)sbdf << 32) |
>> - CF8_ADDR_HI(cf8) |
>> CF8_ADDR_L
On 15/06/15 15:30, Jan Beulich wrote:
> --- a/xen/arch/x86/hvm/hvm.c
> +++ b/xen/arch/x86/hvm/hvm.c
> @@ -2406,11 +2406,6 @@ void hvm_vcpu_down(struct vcpu *v)
> struct hvm_ioreq_server *hvm_select_ioreq_server(struct domain *d,
> ioreq_t *p)
> {
