On 26/05/17 15:40, Carter Yagemann wrote:
> Hi,
>
> A few months ago I extended a prototyping hypervisor called Bareflank to
> include support for Intel Processor Trace (PT) and now I'm trying to
> implement similar functionality in Xen for research. My goal is to
> leverage the existing interfaces
Hi,
A few months ago I extended a prototyping hypervisor called Bareflank to
include support for Intel Processor Trace (PT) and now I'm trying to
implement similar functionality in Xen for research. My goal is to
leverage the existing interfaces as much as possible to minimize the
number of direct
